• Title/Summary/Keyword: Extra-High voltage

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Design of Busbar Joint Condition Monitoring System (부스바 접촉부 체결상태 모니터링 시스템 설계)

  • Jeong, Sung-Hak;Lee, Young-Dong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.823-824
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    • 2016
  • In general, distribution board, panel board and motor control center can be installed over a wide area such as residence of group, building, schools, factories, ports, airports, water service and sewerage, substation and heavy industries that are used to supply converts the voltages extra high voltage into optimal voltage. There are electrical accidents due to rise of contact temperature, loose contact of bus bar, deterioration of the contact resistance, overtemperatue of the bus bars. In this paper, we propose bus bar joints monitoring system with loose connection of bus bar, measuring the joint resistance of busbars and monitoring internal and external heat. The proposed system can be reduced the electrical accidents by maintenance of busbar joints and the temperature of the conductive contact surface of busbars.

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Metal Gate Electrode in SiC MOSFET (SiC MOSFET 소자에서 금속 게이트 전극의 이용)

  • Bahng, W.;Song, G.H.;Kim, N.K.;Kim, S.C.;Seo, K.S.;Kim, H.W.;Kim, E.D.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.358-361
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    • 2002
  • Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

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A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

A 3-D Steady-State Analysis of Thermal Behavior in EHV GIS Busbar

  • Lei, Jin;Zhong, Jian-ying;Wu, Shi-jin;Wang, Zhen;Guo, Yu-jing;Qin, Xin-yan
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.781-789
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    • 2016
  • Busbar has been used as electric conductor within extra high voltage (EHV) gas insulated switchgear (GIS), which makes EHV GIS higher security, smaller size and lower cost. However, the main fault of GIS is overheating of busbar connection parts, circuit breaker and isolating switch contact parts, which has been already restricting development of GIS to a large extent. In this study, a coupled magneto-flow-thermal analysis is used to investigate the thermal properties of GIS busbar in steady-state. A three-dimensional (3-D) finite element model (FEM) is built to calculate multiphysics fields including electromagnetic field, flow field and thermal field in steady-state. The influences of current on the magnetic flux density, flow velocity and heat distribution has been investigated. Temperature differences of inner wall and outer wall are investigated for busbar tank and conducting rod. Considering the end effect in the busbar, temperature rise difference is compared between end sections and the middle section. In order to obtain better heat dissipation effect, diameters of conductor and tank are optimized based on temperature rise simulation results. Temperature rise tests have been done to validate the 3-D simulation model, which is observed a good correlation with the simulation results. This study provides technical support for optimized structure of the EHV GIS busbar.

Optimization Analysis of Connection Part for Electric Power Cable Connection System Using Extra High Voltage Power (초고압 전력 케이블 접속 시스템을 위한 접속재의 최적화 해석)

  • Lee, Yang-Chang;Ryu, Jeong-Hyun;Han, Bong-Soo;Lee, Joon-Seong;Lee, Ho-Jeong;Choi, Yoon-Jong
    • Proceedings of the KAIS Fall Conference
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    • 2009.05a
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    • pp.532-535
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    • 2009
  • 본 논문은 초고압 전력케이블의 접속재 개발을 위한 연구결과로써, 접속시스템의 핵심기술인 고절연 고무슬리브 및 현장에서 접속 작업의 용이성을 위한 Carrier Pipe의 구조해석과 전기적 절연설계에 의한 주요부의 전기적 특성과 전계의 집중을 완화하기 위해 Simulation Tool을 이용한 수치해석 등을 실시하여 최적화된 제품을 제작하였다. 절연설계 및 전계완화 해석에서는 고절연 고무슬리브 구조에서 전계가 집중될 수 있는 중요 포인트를 벡터로 선정하였고 이를 기초로 전계해석을 진행하여 선정된 포인트들에서 전계가 집중됨을 검증하였다. 접속재의 수축거동 해석에 의하면, Carrier Pipe의 구조적 안전성을 확보하기 위하여 고절연 고무슬리브로부터의 압력을 구하여 계산한 결과 최소한 9mm이상의 Carrier Pipe 두께가 필요한 것으로 파악 되었다. 이것은 충분한 강도뿐만 아니라 Carrier Pipe의 변형발생으로 인한 현장에서의 설치문제까지 고려하게 된 값이다. 고절연 고무슬리브 제품설계 에서는 고절연 고무슬리브의 특성조건을 설정하였고 고절연 고무슬리브 제품 및 Carrier Pipe의 Interface 설계 기준을 파악하기 위하여 기존의 고절연 고무슬리브를 활용하여 Carrier Pipe와의 장착 Test를 진행하였다. 그 결과, 확장비율 110%로 적용하였을 경우는 30시간 후에는 완전 붕괴가 되었고, 붕괴가 시작되는 지점이 고절연 고무슬리브의 중앙매립전극 경계면으로써, Simulation Tool을 활용한 접속재 수축 거동 해석 결과와도 일치함을 검증 할 수 있었다.

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Zero-Current Switching LLC Resonant Post-Regulator for Independent Multi-Output (독립된 다중출력을 위한 영전류 스위칭 LLC 공진형 Post-Regulator)

  • Cho, Sang-Ho;Yoon, Jong-Kyu;Roh, Chung-Wook;Hong, Sung-Soo;Kim, Jong-Hae;Lee, Hyo-Bum;Han, Sang-Kyu
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.1
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    • pp.46-53
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    • 2009
  • A new zero-current switching LLC resonant post-regulator for multi-output power system is proposed in this paper. A conventional LLC resonant converter employs extra non-isolated DC/DC converters to obtain tight-regulated multi-slave output voltages. Therefore, it has several serious problems such as a poor efficiency and high cost of production. The proposed post-regulator features low voltage and current stress across the output rectifier diodes and power switches. Moreover, the proposed post-regulator requires only one power switch instead of the bulky and expensive non-isolated DC/DC converter. Therefore, it features a simple structure and lower cost. Especially, since the proposed post-regulator can ensure the ZCS of all power switches, it has very desirable advantages such as more improved EMI characteristics and reduced switching losses. Finally, to confirm the operation, validity, and features of the proposed circuit, experimental results from a proposed zero-current LLC resonant post-regulator are presented.

A Design and Implementation of Busbar Joint and Temperature Measurement System (부스바 접촉 상태 및 온도 감지 시스템 설계 및 구현)

  • Lee, Young-dong;Jeong, Sung-Hak
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.2
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    • pp.379-385
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    • 2017
  • In general, distribution board, panel board and motor control center can be installed over a wide area such as residence of group, building, schools, factories, ports, airports, water service and sewerage, substation and heavy industries that are used to supply converts the voltages extra high voltage into optimal voltage. There are electrical accidents due to rise of contact temperature, loose contact between busbar, deterioration of the contact resistance, over temperature of the busbars. In this paper, we designed and implemented the busbar joint and temperature measurement system, which can measure the joint resistance of busbar and loose connection between busbar using potentiometer and non-contact infrared sensor. The experimental results show that tightening the bolt and nut is fully engaged, resistance was decreased and maximum error range was 0.1mm. Also, the experimental result showed that the temperature at the contact area is increased from $27.3^{\circ}C$ to $69.3^{\circ}C$by the contact resistance.

Manufacture of Portable Inflatable Kayak Using Ultra High Pressure Drop Stitch (초고압 공간지를 이용한 포터블 인플레터블 카약 제작)

  • Park, Chan-Hong;Park, Byeong-Ho;Park, Jong-Dae;Seong, Hyeon-Kyeong;Lim, Lee-Young
    • Journal of Navigation and Port Research
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    • v.37 no.5
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    • pp.551-557
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    • 2013
  • In this paper, we manufactured portable inflatable kayak using ultra high pressure drop stitch. by improving inflatable kayaks' performance with a design using the extra-high-voltage special space paper, they were manufactured to go near to performance of hard shell kayaks. The kayaks were manufactured having all merits of the performance of hard shell kayaks and functionality and portability of the inflatable kayaks, and through performance evaluation of test products, the performance was compared with previous hard shell kayaks. About 6 knot of target speed in the verification result of resistance performance, the developed kayak was more excellent than the HOBIE-KONA kayak by 12.33%. In case of same displacement in a result of inclination test, the centroid of the developed kayak was less distributed by 22.7% than the HOBIE-KONA kayak, based on the bottoms of the ships. This makes the difference for righting arm (GZ) lessened to some degree because the developed kayak is lower than the HOBIE-KONA kayak in the centroid. In the dynamic stability of ship bodies, the HOBIE-KONA kayak showed a little excellent performance. However, in rudder force and resistance factor, the developed kayak was more outstanding than the HOBIE-KONA kayak.

Control of Graphene's Electrical Properties by Chemical Doping Methods

  • Lee, Seung-Hwan;Choi, Min-Sup;La, Chang-Ho;Yoo, Won-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.119-119
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    • 2011
  • This study examined the synthesis of large area graphene and the change of its characteristics depending on the ratio of CH4/H2 by using the thermal CVD methods and performed the experiments to control the electron-hole conduction and Dirac-point of graphene by using chemical doping methods. Firstly, with regard to the characteristics of the large area graphene depending on the ratio of CH4/H2, hydrophobic characteristics of the graphene changed to hydrophilic characteristics as the ratio of CH4/H2 reduces. The angle of contact also increased to 78$^{\circ}$ from 58$^{\circ}$. According to the results of Raman spectroscopy showing the degree of defect, the ratio of I(D)/I(G) increases to 0.42% from 0.25% and the surface resistance also increased to 950 ${\Omega}$ from 750 ${\Omega}$/sq. As for the graphene synthesis at the high temperature of 1,000$^{\circ}$ by using CH4/H2 in a Cu-Foil, the possibility of graphene formation was determined as a function of the ratio of H2 included in the fixed quantity of CH4 as per specifications of every equipment. It was observed that the excessive amount of H2 prevented graphene from forming, as extra H-atoms and molecules activated the reaction to C-bond of graphene. Secondly, in the experiment for the electron-hole conduction and the Dirac-point of graphene using the chemical doping method, the shift of Dirac-point and the change in the electron-hole conduction were observed for both the N-type (PEI) and the P-type (Diazonium) dopings. The ID-VG results show that, for the N-type (PEI) doped graphene, Dirac-point shifted to the left (-voltage direction) by 90V at an hour and by 130 V at 2 hours respectively, compared to the pristine graphene. Carrier mobility was also reduced by 1,600 cm2/Vs (1 hour) and 1,100 cm2/Vs (2 hours), compared to the maximum hole mobility of the pristine graphene.

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