• The Korean Journal of Ceramics
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• v.4 no.1
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• pp.33-36
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• 1998

Epitaxially grown $Bi_4Ti_3O_{12}$ thin films on the MgO(100) substrates was prepared by dipping-pyrolysis process using metal naphthenates as starting materials. The films annealed at various temperatures were charactrized by X-ray diffraction $\theta$-2$\theta$ scans and pole-figure analysis ($\beta$ scanning). Highly c-axia oriented Bi4Ti3O12 films were crystallized by heat-treatment at 700$^{\circ}$ and 75$0^{\circ}C$ from precursor films pyrolyzed at 50$0^{\circ}C$. The X-ray pole-figure analysis indicated that the $Bi_4Ti_3O_{12}$ thin films have an epitaxial relationship with the MgO(100) substrates.

• Transactions on Electrical and Electronic Materials
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• v.5 no.4
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• pp.143-147
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• 2004

Surface defects and bulk defects on SOI wafers are studied. Two new metrologies have been proposed to characterize surface and bulk defects in epitaxial layer transfer (ELTRAN) wafers. They included the following: i) laser scattering particle counter and coordinated atomic force microscopy (AFM) and Cu-decoration for defect isolation and ii) cross-sectional transmission electron microscope (TEM) foil preparation using focused ion beam (FIB) and TEM investigation for defect morphology observation. The size of defect is 7.29 urn by AFM analysis, the density of defect is 0.36 /cm$^2$ at as-direct surface oxide defect (DSOD), 2.52 /cm$^2$ at ox-DSOD. A hole was formed locally without either the silicon or the buried oxide layer (Square Defect) in surface defect. Most of surface defects in ELTRAN wafers originate from particle on the porous silicon.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.3
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• pp.161-164
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• 2002

Polycrystalline and epitaxial heterostructure films of $La_{0.5}Sr_{0.5}CoO_{3}/Pb(Nb_{0.04}Zr_{0.28}Ti_{0.68})O_{3}/La_{0.5}Sr_{0.5}CoO_{3}$ (LSCO/PNZT/LSCO) capacitors were evaluated in terms of low voltage and high speed operation in high density memory, using TiN/Pt conducting barrier combination. Structural studies for a high density ferroelectric memory process flow, which requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack, indicate complete phase purity (i.e. fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, and high-speed characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1612-1614
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• 1996

Analytical expression for the breakdown voltage of the Schottky diode with double epitaxial layer has been obtained. Analytical results agree reasonably with the numerical simulations using MEDICI. It is expected that our results can be used for the optimum design of power MOSFET as well as the Schottky diodes with double epitaxial layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.208-211
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• 2002

$Bi_2Sr_2CuO_x$(Bi-2201) thin films were fabricated by atomic layer-by-layer deposition using an ion beam sputtering method. 10 wt% and 90 wt% ozone mixed with oxygen were used with ultraviolet light irradiation to assist oxidation. At early stages of the atomic layer by layer deposition, two dimensional epitaxial growth which covers the substrate surface would be suppressed by the stress and strain caused by the lattice misfit, then three dimensional growth takes place. Since Cu element is the most difficult to oxidize, only Sr and Bi react with each other predominantly, and forms a buffer layer on the substrate in an amorphous-like structure, which is changed to $SrBi_2O_4$ by in-situ anneal.

• International Journal of Precision Engineering and Manufacturing
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• v.7 no.4
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• pp.18-22
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• 2006

Although many efforts have been made in making nanometer-sized holes, there is still a major challenge in fabricating individual single-digit nanometer holes in a more controllable way for different materials, size distribution and hole shapes. In this paper we describe our efforts to use a top down approach in nanofabrication method to make single-digit nanoholes. There are three major steps towards the fabrication of a single-digit nanohole. 1) Preparing the freestanding thin film by epitaxial deposition and electrochemical etching. 2) Making sub-micro holes ($0.2{\mu}\;to\;0.02{\mu}$) by focused ion beam (FIB), electron beam (EB), atomic force microscope (AFM), and others methods. 3) Reducing the hole size to less than 10 nm by epitaxial deposition, FIB or EB induced deposition and micro coating. Preliminary work has been done on thin films (30 nm in thickness) preparation, sub-micron hole fabrication, and E-beam induced deposition. The results are very promising.

• Journal of the Korean Society for Heat Treatment
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• v.22 no.6
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• pp.354-360
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• 2009

This paper reports the oxidation mechanism of epitaxial Ni thin films grown on GaN/sapphire(0001) substrates, investigated by real-time x-ray diffraction and scanning electron microscopy. At the initial stage of oxidation process, a thin NiO layer with a thickness of ${\sim}50\;{\AA}$ was formed on top of the Ni films. The growth of such NiO layer was saturated and then served as a passive oxide layer for the further oxidation process. For the second oxidation stage, host Ni atoms diffused out to the surfaces of initially formed NiO layer through the defects running vertically to form NiO grains, while the sites that were occupied by host Ni, became voids. The crystallographic properties of resultant NiO films, such as grain size and mosaic distribution, rely highly on the oxidation temperatures.

• The Korean Journal of Ceramics
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• v.3 no.3
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• pp.191-194
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• 1997

Epitaxial Pb(Zr, Ti)O3(PZT) thin films were prepared on MgO(100) substrates by dipping-pyrolysis (DP) process using metal naphthenates as starting materials, and effects of pyrolysis and final heat-treatment conditions on the film's orientation were investigated. Solid-state epitaxial growth of PZT proceeds at lower temperature around 650℃ from the precursor pyrolyzed at 350 and 500℃. The in-plane alignment of the PZT films depends not only on the final heat-treatment temperature but on the pyrolysis conditions; the films, pyrolyzed at a higher temperature for a short time, i.e., at 500℃ for 10 min, exhibited stronger orientation after the same final heat treatment at 650°∼750℃. The PZT films with the strongest orientation were prepared by pyrolysis under the above conditions followed by final heat treatment at 750℃.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.107-112
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• 2011

This paper is for improving the RF frequency performance of a fabricated 100nm ${\Gamma}$-gate MHEMT, scaling down vertically for the epitaxy-structure layers of the device. Hydrodynamic simulation parameters are calibrated for the fabricated MHEMT with the modulation-doped $In_{0.52}Al_{0.48}As/In_{0.53}Ga_{0.47}$As heterostructure grown on the GaAs substrate. With these calibrated parameters, simulations for the vertically-scaled epitaxial layers of the device are performed and analyzed for DC/RF characteristics, including the quantization effect due to the thickness reduction of InGaAs channel layer. A newly designed epitaxy-structure device shows higher extrinsic transconductance, $g_m$ of 1.556 S/mm, and higher frequency performance, $f_T$ of 222.5 GHz and $f_{max}$ of 849.6 GHz.

• Electronics and Telecommunications Trends
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• v.3 no.4
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• pp.3-12
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• 1988

Epilayer growing process has been recognized as a key technology for successful GaAs based devices and integrations. These may include HEMT, multiple quantum well structures, band gap engineering, and quantum confinement heterostructures. The fabrication of epilayers in these devices must meet very stringent requirements in terms of crystallinity, composition, film thickness and interface quality. In particular, the quality of interfaces is getting more important because the film thickness, and flatness, roughness and stability at interface of ultrathin films cause critical effects on the device performance. This article reviews the current status of modern epitaxial techniques which have been developed in the last few years. First, the new techniques PLE, GI, MEE, TSL based on MBE technique will be reviewed and their technical importance will be stressed. Secondly, MOMBE, GSMBE, CBE which combine the advantages of MBE and MOCVD will also be discussed. Thirdly, the new sophisticated epitaxial technique, ALE, of which mechanism is totally different from others, will also be reviewed. Finally, areas which should be exploited more extensively to accomplish these techniques will be addressed.