• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.55-62
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• 2012

The development of memory design and process technology enabled the production of high density memory. As the weight of embedded memory within aggregate Systems-On-Chips(SoC) gradually increases to 80-90% of the number of total transistors, the importance of testing embedded dual-port memories in SoC increases. This paper proposes a new micro-code based programmable memory Built-In Self-Test(PMBIST) architecture for dual-port memories that support test various test algorithms. In addition, various test algorithms including March based algorithms and dual-port memory test algorithms are efficiently programmed through the proposed algorithm instruction set. This PMBIST has an optimized hardware overhead, since test algorithm can be implemented with the minimum bits by the optimized algorithm instructions.

• Journal of the Korea Society of Computer and Information
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• v.19 no.10
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• pp.1-12
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• 2014

This paper implements and improves the performance of high computational subtractive clustering algorithm using a single instruction, multiple data (SIMD) based many-core processor. In addition, this paper implements five different processing element (PE) architectures (PEs=16, 64, 256, 1,024, 4,096) to select an optimal PE architecture for the subtractive clustering algorithm by estimating execution time and energy efficiency. Experimental results using two different medical images and three different resolutions ($128{\times}128$, $256{\times}256$, $512{\times}512$) show that PEs=4,096 achieves the highest performance and energy efficiency for all the cases.

• Journal of Advanced Navigation Technology
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• v.14 no.2
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• pp.233-238
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• 2010

In this paper, we applied the forward and backward error recovery techniques to a reduced instruction set computer (risc) processor to develop two fault-tolerant processors, namely, fetch redundant risc (FRR) processor and a redundancy execute risc (RER) processor. To evaluate the fault-tolerance capability of three target processors, we developed the base risc processor, FRR processor, and RER processor in SystemC hardware description language. We performed fault injection experiment using the three SystemC processor models and the SystemC-based simulation fault injection technique. From the experiments, for the 1-bit transient fault, the failure rate of the FRR, RER, and base risc processor were 1%, 2.8%, and 8.9%, respectively. For the 1-bit permanent fault, the failure rate of the FRR, RER, and base risc processor were 4.3%, 6.5%, and 41%, respectively. As a result, for 1-bit fault, we found that the FRR processor is more reliable among three processors.

• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.259-266
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM (or SRAM) cell. Layout pitch of one-bit-wide logic is Identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1) simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.397-400
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• 2009

This paper describes ASIC design of Multimedia application SoC platform based RISC processor with BTB(Branch Target Buffer). For performance enhancement of platform, we use a simple branch prediction scheme, BTB structure, that stores a target address for branch instruction to remove pipeline harzard. Also, the platform includes a number of peripheral such as VGA controller, AC97 controller, UART controller, SRAM interface and Debug interface. The platform is designed and verified on a Xilinx VERTEX-4 FPGA using a number of test programs for functional tests and timing constraints. Finally, the platform is implemented into a single ASIC chip which can be operated at 100MHz clock frequency using the Chartered 0.18um process. As a result of performance estimation, the proposed platform shows about 5~9% performance improvement in comparison with the previous SoC Platform.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.90-93
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• 2019

Recently, as SW education has been emphasized in college, interest in Computing Thinking (CT) class at the liberal level has increased. In order to effectively educate students, various methods of teaching and learning are required to reduce the burden on CT education and motivation of students. The purpose of this study is to design teaching and learning using ARCS model to improve learners' learning motivation and learning achievement in CT course as liberal arts education. In this study, the learning elements of CT were selected based on previous research on the characteristics of education in the liberal arts education of the university and analysis of the CT content. In addition, Keller 's ARCS learning motive model was selected to match the instructional tactics according to the motivational factors of Attention, Relevance, Confidence, and Satisfaction. In order to effectively teach these CT contents, detailed strategies based on the ARCS model were designed and presented weekly.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.855-858
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• 2006

First of all, Developing information technology makes it possible to change a paradigm of all kinds of areas, including an education. Students can choose learning goals and objects themselves and acquire not the accumulation of knowledge but the method of their learning. Moreover, Teachers get to be adviser, and students play a key role in teaming. That is, the subject of leaning is students. Constructivism emphasizes the student-oriented environment of education, which corresponds to the characteristics of hypeimedia. In addition, Internet allows us to make a practical plan for constructivism. Web Based Internet provides us with a proper environment to make constructivism practice md causes an education system to change. Sure Web Based Instruction makes them motivated to learn more, they can gain plenty of information regardless of places or time. Besides, they are able to consult more up-to-date information regarding their learning use hypermedia such as an image, audio, video, and test, and effectively communicate with their instructor through a board, an e-mail, a chatting etc. A school and instructors have been making effort to develop a new model of a teaching method to cope with a new environment change. In this thesis, with 'Design and Implementation of Web Based Instruction Based on Constructivism', providing online learner-oriented and indexed video lesson, learners can get chance of self-oriented learning. In addition, learners doesn't have to cover all contents of a lesson but can choose contents they want to have from a indexed list of a lesson, and they ran search contents they want to have with a 'Keyword Search' on a main page, which can make learners improve learner's achievement.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.329-331
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• 2018

In this paper, we propose a monitoring system that starts with the supply of raw materials for threading, is processed into a lathe machine, and checks for defects of the product are automatically performed by the robot with Smart Factory technology through assembly and disassembly. Completion check according to the production instruction quantity and production instruction is made by checking the production status according to whether or not the raw material is worn by the displacement sensor, and checking the pitch and the contour of the processed female and male to determine OK and NG. The robotic system acts as a relay for loading and unloading of raw materials, pallet transfer, and overall process, and it acts as an intermediary for organically driving. The location information of the threaded products is collected by using the non-contact wireless tag and the energy saving system Production efficiency and utilization rate were checked. The environmental sensor collects the air-conditioning environment data (temperature, humidity), measures the temperature and humidity accurately, and checks the quality of product processing. It monitors and monitors the driving hazard level environment (overheating, humidity) of the product. Controls for CNC and robot module PLC as a heterogeneous system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.7
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• pp.81-87
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• 2018

Problem-based learning (PBL) appears to be a superior and effective strategy to train competent and skilled practitioners and to promote long-term retention of knowledge and skills acquired during the learning experience. This study concerns the implementation of PBL in the online environment and face-to-face PBL. An online environment allows participants to communicate with one another, view presentations or videos, interact with other participants, and engage with resources in work groups. Nowadays, education is accessible everywhere with the use of digital devices. Educational institutions subscribe to GSuite for Education, and Google introduced its Google Classroom as an e-learning platform. This study aims to analyze Google Classroom and to design PBL for Mongolian students taking Korean courses. The main objective of this paper is to identify the usability and evaluation of Google Classroom. The result of this study will be a proposed e-learning platform for Dornod University, Mongolia, which is initially needed in the Natural Science and Business Department.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.7
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• pp.1329-1337
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• 2008

The project of Education information is promoted to maximize the efficiency of Teaching-Learning at schools. So Ministry of Education & Human Resources Development develops and spreads the Computer Assisted Instruction(CAI) and outstanding Educational Software to help learners who can utilize this software and make learning environment to form their own recognition. As the number of this software is increased, the necessity of management of Educational Software is required. This study divides Educational Software into three kinds, teaching-learning software, business management software, and system management software, and suggests how to use these softwares effectively according to this division. After the users log into the system through joining members, they are divided into manager module, teachers module, and students module. The manager manages all software like registration, revision, reference of date and so on. The teacher accesses properly. The student accesses teaching-learning software and prepares and reviews his lessons at any time.