• Title/Summary/Keyword: Emitter

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Modeling of InP/InGaAs HPT with ITO Transparent Emitter Contact (ITO 투명전극을 갖는 InP/InGaAs HPTs 모델링)

  • Jang, Eun-Sook;Choi, Byong-Gun;Shin, Ju-Sun;Sung, Kyang-Su;Han, Kyo-Yong
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.9-12
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    • 2000
  • InP/lnGaAs heterojunciton phototransistors (HPTs) with transparent emitter contacts were fabricated and characterized. Indium Tin Oxide was RF sputtered for the emitter contacts. By comparison with InP/InGaAs HBTs, the dc characteristics of InP/lnGaAs HPTs demonstrated offset voltage due to ITO emitter contacts and similar common emitter current gain. The model parameters were extracted and a simple SPICE simulations were performed.

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InGaAs/InP HPT's with ITO Transparent Emitter Contacts (ITO 에미터 투명전극을 갖는 InGaAs/InP HPT의 연구)

  • Han, Kyo-Yong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.3
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    • pp.268-272
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    • 2007
  • A fully integrable InP/InGaAs HPT with an ITO emitter contact was first fabricated by employing a $SiO_2$ passivation layer. The electrical and the optical characteristics of the HPT with a passivation layer were measured and compared with those of the HPT without a passivation layer. The only noticeable difference was the increased emitter series resistance of the HPT with a passivation layer. AES analysis was performed to explain the reason of the increased emitter series resistance. Results show that PECVD $SiO_2$ deposition and annealing processes cause the diffusion of oxygen to the interface and the depletion of tin at the interface, which may be responsible for the increase of the series resistance.

Polysilicon-emitter, self-aligned SiGe base HBT using solid source molecular beam epitaxy (고상원 분자선 단결정 성장법을 이용한 다결정 실리콘 에미터, 자기정렬 실리콘 게르마늄 이종접합 쌍극자 트랜지스터)

  • 이수민;염병렬;조덕호;한태현;이성현;강진영;강상원
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.2
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    • pp.66-72
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    • 1995
  • Using the Si/SiGe layer grown by solid source molecular beam epitaxy(SSMBE) on the LOCOS-patterned wafers, an emitter-base self-aligned hterojunction biplar transistor(HBT) with the polysilicon-emitter and the silicon germanium(SiGe) base has been fabricated. Trech isolation process, planarization process using a chemical-mechanical poliching, and the selectively implanted collector(SIC) process were performed. A titanium disilicide (TiSi$_{2}$), as a base electrode, was used to reduce an extrinsic base resistance. To prevent the strain relaxation of the SiGe epitaxial layer, low temperature (820${^\circ}C$) annealing process was applied for the emitter-base junction formation and the dopant activation in the arsenic-implanted polysilicon. For the self-aligned Si/SiGe HBT of 0.9${\times}3.8{\mu}m^{2}$ emitter size, a cut-off requency (f$_{T}$) of 17GHz, a maximum oscillation frequency (f$_{max}$) of 10GHz, a current gian (h$_{FE}$) of 140, and an emitter-collector breakdown voltage (BV$_{CEO}$) of 3.2V have been typically achieved.

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Fabrication of Field-Emitter Arrays using the Mold Method for FED Applications

  • Cho, Kyung-Jea;Ryu, Jeong-Tak;Kim, Yeon-Bo;Lee, Sang-Yun
    • Transactions on Electrical and Electronic Materials
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    • v.3 no.1
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    • pp.4-8
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    • 2002
  • The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

A Carbon Nanotube Field Emitter with a Triode Configuration for a Miniature Mass Spectrometer (초소형 질량분석기를 위한 삼극관 구조의 탄소나노튜브 전자방출원)

  • Lee, Yu-Ri;Lee, Ki-Jung;Hong, Nguyen Tuan;Lee, Soon-Il;Yang, Sang-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.7
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    • pp.1001-1006
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    • 2012
  • This paper presents a carbon nanotube (CNT) triode-structure field emitter as an ion source in a micro time-of-flight mass spectrometer(TOF-MS). In the ion source by field emission, the electrons emitted from cathodes under an electric field accelerated to the anode and ionize gas molecules by impact before arriving the anode. The generated positive ions are to be accelerated to the ion collector. Whereas most of ions are drawn to the cathodes in diode field emitters, a grid in the triode field emitter prevents the ions from being drawn to the cathodes. The triode field emitter is fabricated by micromachining. The cathode is composed of six CNT cylinders. The total size of the fabricated device is $8.0{\times}7.3{\times}1.9mm^3$. The anode and the grid current of the fabricated CNT field emitter were measured for various anode and grid voltages. When the anode and the grid voltages are 1000 V and 990 V, respectively, the emission current passing through the ionization region is 8.6 ${\mu}A$, which is a sufficient emission current for ionization and mass spectrometry.

A Study on the Dual Emitter Structure 4H-SiC-based LIGBT for Improving Current Driving Capability (전류 구동 능력 향상을 위한 듀얼 이미터 구조의 4H-SiC 기반 LIGBT에 관한 연구)

  • Woo, Je-Wook;Lee, Byung-Seok;Kwon, Sang-Wook;Gong, Jun-Ho;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.371-375
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    • 2021
  • In this paper, a SiC-based LIGBT structure that can be used at high voltage and high temperature is presented. In order to improve the low current characteristic, a dual-emitter symmetrical around the gate is inserted. In order to verify the characteristics of the proposed device, simulation and design were conducted using Sentaurus TCAD simulation, and a comparative study was conducted with a general LIGBT. In addition, splitting was performed by designating a variable for the length of the N-drift region in order to verify the electrical characteristics of the minority carriers. As a result of the simulation it was confirmed that the proposed dual-emitter structure flows a higher current at the same voltage than the conventional LIGBT.

PA study on selective emitter structure and Ni/Cu plating metallization for high efficiency crystalline silicon solar cells (결정질 실리콘 태양전지의 고효율 화를 위한 Selective emitter 구조 및 Ni/Cu plating 전극 구조 적용에 관한 연구)

  • Kim, Minjeong;Lee, Jaedoo;Lee, Soohong
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.91.2-91.2
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    • 2010
  • The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

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The effect of heat treatment parameters on the emitter formation of the n-type silicon solar cell (n형 규소 태양전지 emitter형성에 미치는 열처리 변수의 영향)

  • Shim, Ji-Myung;Kim, Young-Kwan
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.18 no.5
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    • pp.179-183
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    • 2008
  • Employing screen printing technology, aluminum is applied to the back side of the n-type silicon wafer to see the effect of the heat treatment parameters on the Voc of the solar cell, Heat treatment at $850^{\circ}C$ produces the highest Voc among various heat treatment conditions. Heat treatment at the temperatures higher than $850^{\circ}C$ results in lower Voc, which is due to the destruction of the Al-Si alloy emitter layer. The destruction of Al-Si layer observed to be caused by the vigorous movement of silicon atoms toward aluminum layer during the heat treatment.

Studies of electron emitters for a miniaturized electron column design (초소형 전자 칼럼 설계를 위한 전자 방출원 연구)

  • Kim, Young-Chul;Kim, Dae-Wook;Ahn, Seung-Joon;Kim, Ho-Seob;Jang, Won-Kweon
    • Korean Journal of Optics and Photonics
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    • v.13 no.4
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    • pp.314-318
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    • 2002
  • We examine the adjustment of the semiconvergent angle and current for the miniaturized micro column working at low voltage but producing maximized current. Our study shows that the minimum electron beam sizes are 10 ㎚ for the cold field emitter (CFE) and 20 ㎚ for the thermal field emitter (TFE) at a given condition.

Analysis of The Dual-Emitter LIGBT with Low Forward Voltage Loss and High Lacth-up Characteristics (낮은 순방향 전압 강하와 높은 래치-업 특성을 갖는 이중-에미터 구조의 LIGBT에 관한 분석)

  • Jung, Jin-Woo;Lee, Byung-Seok;Park, San-Cho;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.15 no.2
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    • pp.164-170
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    • 2011
  • In this paper, we present a novel Lateral Insulated-Gate Bipolar Transistor(LIGBT) structure. The proposed structure has extra emitter between emitter and collector of the conventional structure. The added emitter can significantly improve latch-up current densities, forward voltage drop (Vce,sat) and turn-off characteristics. From the simulation results, the proposed LIGBT has the lower forward voltage drop(1.05V), the higher latch-up current densities($2.5{\times}10^3\;A/{\mu}m^2$), and the shorter turn-off time(7.4us) than those of the conventional LIGBT.