• Title/Summary/Keyword: Electrostatic current

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Problems and Countermeasures in Installation of Down Conductor Systems (인하도선시스템 시설에서의 문제점과 대책)

  • 이복희;이동문;강성만;엄주홍;정동철;이승칠;안창환
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.4
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    • pp.38-45
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    • 2002
  • This paper describes the technical issues of the domestic standard and guideline for lightning protection systems in order to propose the countermeasures in damage of computer and electronic equipments due to lightning surges. The relationship between the current flow in the down conductor and the current flow in the steel conduit surrounding the down conductor was investigated as a function of the installation method of down conductors. Also the experiments were conducted to evaluate the influences of the skin effect on the down conductor systems. As a result, when the down conductor were bonded to the steel conduit, the down conductor and the steel conduit act as one conductor, so much mure lightning current flows in the steel conduit than in the copper down conductor because of the skin effect and choking effect. Therefore to reduce the adverse effects such as the electrostatic induction and side flashes caused by the potential rise of down conductors due to lightning currents, it is extremely effective to bond the down conductor to the steel conduit and steel frame of structures.

Analyses of the current market trend and research status of indoor air quality control to develop an electrostatic force-based dust control technique (정전기적 힘을 이용한 실내공기 미세부유먼지 제거 요소기술의 개발을 위한 기술별 시장현황 및 연구 동향 분석)

  • Yoon, Young H.;Joo, Jin-Chul;Ahn, Ho-Sang;Nam, Sook-Hyun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.12
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    • pp.6610-6617
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    • 2013
  • This study examined the current and future Indoor Air Quality (IAQ) control device markets and analyzed the recent studies on indoor air pollutantr emoval to develop a new technology for fine dust control. Currently, the mechanical filter technique occupies the bulk of the IAQ control market but the electronic technique is emerging as an alternative to control fine dust efficiently. Among the gaseous VOCs and fine dust particles contaminating the indoor air quality, fine dust particles are more problematic because they threaten human health by penetrating deep into the body and producing secondary contaminants by chemical reaction with VOCs. The electronic IAQ control device using dielectrophoretic and electrostatic forces is a good option for public spaces where many people pass, and at the same time, it needs to consider temperature, humidity, and the particle properties of specific areas to highlight the control efficiency. Electronic-related technology is expected to be used widely in many public/private spaces wherever a dust-free environment is required.

Trade-off Characteristic between Gate Length Margin and Hot Carrier Lifetime by Considering ESD on NMOSFETs of Submicron Technology

  • Joung, Bong-Kyu;Kang, Jeong-Won;Hwang, Ho-Jung;Kim, Sang-Yong;Kwon, Oh-Keun
    • Transactions on Electrical and Electronic Materials
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    • v.7 no.1
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    • pp.1-6
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    • 2006
  • Hot carrier degradation and roll off characteristics of threshold voltage ($V_{t1}$) on NMOSFETs as I/O transistor are studied as a function of Lightly Doped Drain (LDD) structures. Pocket dose and the combination of Phosphorus (P) and Arsenic (As) dose are applied to control $V_{t1}$ roll off down to the $10\%$ gate length margin. It was seen that the relationship between $V_{t1}$ roll off characteristic and substrate current depends on P dopant dose. For the first time, we found that the n-p-n transistor triggering voltage ($V_{t1}$) depends on drain current, and both $I_{t2}$ and snapback holding voltage ($V_{sp}$) depend on the substrate current by characterization with a transmission line pulse generator. Also it was found that the improved lifetime for hot carrier stress could be obtained by controlling the P dose as loosing the $V_{t1}$ roll off margin. This study suggests that the trade-off characteristic between gate length margin and channel hot carrier (CHC) lifetime in NMOSFETs should be determined by considering Electrostatic Discharge (ESD) characteristic.

Analysis of interaction between intracellular spermine and transient receptor potential canonical 4 channel: multiple candidate sites of negatively charged amino acids for the inward rectification of transient receptor potential canonical 4

  • Kim, Jinsung;Moon, Sang Hui;Kim, Taewook;Ko, Juyeon;Jeon, Young Keul;Shin, Young-Cheul;Jeon, Ju-Hong;So, Insuk
    • The Korean Journal of Physiology and Pharmacology
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    • v.24 no.1
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    • pp.101-110
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    • 2020
  • Transient receptor potential canonical 4 (TRPC4) channel is a nonselective calcium-permeable cation channels. In intestinal smooth muscle cells, TRPC4 currents contribute more than 80% to muscarinic cationic current (mIcat). With its inward-rectifying current-voltage relationship and high calcium permeability, TRPC4 channels permit calcium influx once the channel is opened by muscarinic receptor stimulation. Polyamines are known to inhibit nonselective cation channels that mediate the generation of mIcat. Moreover, it is reported that TRPC4 channels are blocked by the intracellular spermine through electrostatic interaction with glutamate residues (E728, E729). Here, we investigated the correlation between the magnitude of channel inactivation by spermine and the magnitude of channel conductance. We also found additional spermine binding sites in TRPC4. We evaluated channel activity with electrophysiological recordings and revalidated structural significance based on Cryo-EM structure, which was resolved recently. We found that there is no correlation between magnitude of inhibitory action of spermine and magnitude of maximum current of the channel. In intracellular region, TRPC4 attracts spermine at channel periphery by reducing access resistance, and acidic residues contribute to blocking action of intracellular spermine; channel periphery, E649; cytosolic space, D629, D649, and E687.

Electrical Characteristic of Power MOSFET with Zener Diode for Battery Protection IC

  • Kim, Ju-Yeon;Park, Seung-Uk;Kim, Nam-Soo;Park, Jung-Woong;Lee, Kie-Yong;Lee, Hyung-Gyoo
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.1
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    • pp.47-51
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    • 2013
  • A high power MOSFET switch based on a 0.35 ${\mu}m$ CMOS process has been developed for the protection IC of a rechargeable battery. In this process, a vertical double diffused MOS (VDMOS) using 3 ${\mu}m$-thick epi-taxy layer is integrated with a Zener diode. The p-n+Zener diode is fabricated on top of the VDMOS and used to protect the VDMOS from high voltage switching and electrostatic discharge voltage. A fully integrated digital circuit with power devices has also been developed for a rechargeable battery. The experiment indicates that both breakdown voltage and leakage current depend on the doping concentration of the Zener diode. The dependency of the breakdown voltage on doping concentration is in a trade-off relationship with that of the leakage current. The breakdown voltage is obtained to exceed 14 V and the leakage current is controlled under 0.5 ${\mu}A$. The proposed integrated module with the application of the power MOSFET indicates the high performance of the protection IC, where the overcharge delay time and detection voltage are controlled within 1.1 s and 4.2 V, respectively.

Effect of Output-conductance on Current-gain Cut-off frequency in In0.8Ga0.2As High-Electron-mobility Transistors (In0.8Ga0.2As HEMT 소자에서 Output-conductance가 차단 주파수에 미치는 영향에 대한 연구)

  • Rho, Tae-Beom;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.29 no.5
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    • pp.324-327
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    • 2020
  • The impact of output conductance (go) on the short-circuit current-gain cut-off frequency (fT) in In0.8Ga0.2As high-electron-mobility transistors (HEMTs) on an InP substrate was investigated. An attempted was made to extract the values of fT in a simplified small-signal model (SSM) of the HEMTs, derive an analytical formula for fT in terms of the extrinsic model parameters of the simplified SSM, which are related to the intrinsic model parameters of a general SSM, and verify its validity for devices with Lg from 260 to 25 nm. In long-channel devices, the effect of the intrinsic output conductance (goi) on fT was negligible. This was because, from the simplified SSM perspective, three model parameters, such as gm_ext, Cgs_ext and Cgd_ext, were weakly dependent on goi. However, in short-channel devices, goi was found to play a significant role in degrading fT as Lg was scaled down. The increase in goi in short-channel devices caused a considerable reduction in gm_ext and an overall increase in the total extrinsic gate capacitance, yielding a decrease in fT with goi. Finally, the results were used to infer how fT is influenced by goi in HEMTs, emphasizing that improving electrostatic integrity is also critical importance to benefit fully from scaling down Lg.

Control of Bacterial Adhesion and Biofilm Using Electric Field (전기장을 이용한 미생물 부착과 생물막 제어)

  • Shim, Soo-Jin;Kim, Choon-Soo;Yoon, Je-Yong
    • Journal of Korean Society of Environmental Engineers
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    • v.33 no.9
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    • pp.692-700
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    • 2011
  • The use of electric field has been studied as an alternative for biofilm control dominated by disinfectants and antibiotics. This technology would be advantageous in the environmental respect that biofilm can be controlled based on electron transfer, not using chemical disinfectants and antibiotics. Control mechanisms which were reported by earlier studies are organized as; (1) bacterial adhesion control by electrostatic repulsion at a negative current, (2) bacterial adhesion control using bacterial motion and (3) bacterial inactivation by direct oxidation at a positive current, (4) bioelectric effect leading to biofilm inactivation. In this review article, we summarized the technologies for biofilm control using electric field and provided some application examples from previous studies.

Recent Developments in Agricultural Sprays : Review

  • No, S. Y.
    • Agricultural and Biosystems Engineering
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    • v.3 no.1
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    • pp.44-54
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    • 2002
  • A brief review of current status in the field of agricultural spray and future research challenges are presented. Researches on the pesticides sprays, pollen sprays, postharvest sprays, and biological control agent sprays among the various applications of agricultural spray were selected and reviewed. In the agrochemical sprays, the techniques to increase the deposition such as electrospray and reduce the drift such as introductions of drift retardants and of mechanical means are reviewed. The introduction of mechanical means includes low drift, air-assisted, air inclusion, shield or shroud assisted and pulse flow nozzles. For flat fan nozzles, the data of breakup length and thickness of liquid sheet are essential to understand the atomization processes and develop the transport model to target In the air-assisted spray technology to reduce drift, further works on the effect of application height on drift and air assistance on droplet size should be followed. In addition, methods for quantifying the included air in the air inclusion techniques are required. The atomization characteristics of biopesticides spray are not being elucidated and the formulations of biopesticides should be taken into account the spray characteristics of existing nozzle and sprayer. A few researches on the droplet size of fallout can be found in the literature. A combined technology with electrostatic method into one of method for the reduction of drift may be an effective strategy for increasing deposition and reducing drift. Only an integrated approach involving all stakeholders such as engineers, chemists, and biologists, etc. can result in improved application of agricultural spray.

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Performance Optimization Study of FinFETs Considering Parasitic Capacitance and Resistance

  • An, TaeYoon;Choe, KyeongKeun;Kwon, Kee-Won;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.525-536
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    • 2014
  • Recently, the first generation of mass production of FinFET-based microprocessors has begun, and scaling of FinFET transistors is ongoing. Traditional capacitance and resistance models cannot be applied to nonplanar-gate transistors like FinFETs. Although scaling of nanoscale FinFETs may alleviate electrostatic limitations, parasitic capacitances and resistances increase owing to the increasing proximity of the source/drain (S/D) region and metal contact. In this paper, we develop analytical models of parasitic components of FinFETs that employ the raised source/drain structure and metal contact. The accuracy of the proposed model is verified with the results of a 3-D field solver, Raphael. We also investigate the effects of layout changes on the parasitic components and the current-gain cutoff frequency ($f_T$). The optimal FinFET layout design for RF performance is predicted using the proposed analytical models. The proposed analytical model can be implemented as a compact model for accurate circuit simulations.

Design of SCR-Based ESD Protection Circuit for 3.3 V I/O and 20 V Power Clamp

  • Jung, Jin Woo;Koo, Yong Seo
    • ETRI Journal
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    • v.37 no.1
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    • pp.97-106
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    • 2015
  • In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).