• Nuclear Engineering and Technology
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• v.56 no.4
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• pp.1532-1537
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• 2024

Time-of-flight (TOF) PET detectors with fast-rise-time scintillators and fast-single photon time resolution silicon photomultiplier (SiPM) have been developed to improve the coincidence timing resolution (CTR) to sub-100 ps. The CTR can be further improved with an optimal bandwidth and minimized electronic noise in the readout circuit and this helps reduce the distortion of the fast signals generated from the TOF-PET detector. The purpose of this study was to develop an ultra-high frequency and fully-differential (UF-FD) readout circuit that minimizes distortion in the fast signals produced using TOF-PET detectors, and suppresses the impact of the electronic noise generated from the detector and front-end readout circuits. The proposed UF-FD readout circuit is composed of two differential amplifiers (time) and a current feedback operational amplifier (energy). The ultra-high frequency differential (7 GHz) amplifiers can reduce the common ground noise in the fully-differential mode and minimize the distortion in the fast signal. The CTR and energy resolution were measured to evaluate the performance of the UF-FD readout circuit. These results were compared with those obtained from a high-frequency and single ended readout circuit. The experiment results indicated that the UF-FD readout circuit proposed in this study could substantially improve the best achievable CTR of TOF-PET detectors.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.131-144
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• 2015

An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ${\Phi}_{M1}/{\Phi}_{M2}/{\Phi}_{M3}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.4-4
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• 2009

Surface analysis on defective wire-bonding pads are performed in flash memory assembly. Week wire bonding may cause a significant effect on the final product reliability, and the surface condition of the aluminum bond pads is critical in terms of product reliability. To find out possible week bonding on semiconductor interconnects, ball sheer test (BST) has been performed. On some defective or week bonded pads, we have investigated the surface contents, assuming that the week bonding is induced from the surface conditions. AES and XPS are employed for the quantitative surface analysis on defective dies.

• Transactions on Electrical and Electronic Materials
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• v.6 no.4
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• pp.149-153
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• 2005

In this paper, we investigated the island density-dependent stress distribution of indium-tin-oxide (ITO) film on polycarbonate substrate by external bending force. We used e-beam and RF­sputter for SiON, ITO sputtering. It was found that there are influence of island density on the substrate and decreasing crack density as goes to the minimum density. From the result that crack density was increasing at maximum island density, it is evident that more stress is imposed on same island position as island density.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.7-8
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• 2006

The effects of heat treatment on the electrical properties of SGOI were examined. We proposed the optimized heat treatments for improving the interfacial electrical properties in SGOI-MOSFET. By applying the additional pre-RTA(rapid thermal annealing) before gate oxidation and post-RTA after dopant activation, the driving current, the transconductance, and the leakage current were improved significantly.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.5
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• pp.399-402
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• 2007

The effects of heat treatment on the electrical properties of strained-Si/SiGe-on-insulator (SGOI) devices were examined. We proposed the optimized heat treatment processes for improving the back interfacial electrical properties in SGOI-MOSFET. By applying the additional pre-RTA (rapid thermal annealing) before gate oxidation step and the post-RTA after source/drain dopant activation step, the electrical properties of strained-Si channel on $Si_{1-x}Ge_x$ layer were greatly improved, which resulting the improvement of the driving current, transconductance, and leakage current of SGOI-MOSFET.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.243-244
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• 2008

점점 전송 기술이 발달함에 따라, 고속/대용량의 광 연결 기술이 많이 응용되고 있다. 소자들 또한 이러한 광 신호를 받기에 적합한 형태가 필요하다. 따라서 본 논문에서는, 미리 설계한 광 신호로 동작하는 PZT 액추에이터의 동작 범위와 변위를 FEM 시뮬레이션(Finite Element Method Simulation)을 통해 해석해 보니 10V 전압에서 532nm의 변위를 확인할 수 있었고, 또한 열적, 기계적, 전기적 해석을 통하여 차후 제작에 감안할 점들을 찾아내는데 주안점을 두었다.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.1-3
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• 2002

A p-n junction was obtained by the deposition of an n-type ZnO thin film on a p-type Zn-doped InP substrate. The Zn-doped InP substrate has been made by the diffusion of Zn with sealed ampoule technique. The ZnO deposition process was performed by pulsed laser deposition (PLD). The p-n junction was formed and showed typical I-V characteristics. We will also discuss about the realization of an ultraviolet light-emitting diode (LED). The structure of n-ZnO/p-Zn-doped InP could be a good candidate for the realization of an ultraviolet light-emitting diode or an ultraviolet laser diode.

• Transactions on Electrical and Electronic Materials
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• v.4 no.5
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• pp.24-27
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• 2003

We have been investigated phase-change with temperature and electric field in chalcogenide Ge$_2$Sb$_2$Te$\sub$5/ thin film. T$\sub$c/(crystallization temperature) is confirmed by measuring the resistance with the varying temperature on the hotplate. We have measured I-V characteristics with Ge$_2$Sb$_2$Te$\sub$5/ chalcogenide thin film. It is compared with I-V characteristics after impress the variable pulse. The pulse has variable height and duration.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.258-258
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• 2007

일반적인 CMOS공정으로는 높은 주파수 대역에서 높은 Q factor를 갖는 인덕터를 구현하는데 어렵고 이에 반해 RF ICs는 갈수록 high Q를 가지는 인덕터가 요구되고 있다. 이를 LTCC 기판 위에 인덕터를 구현했을 때 놓은 주파수 대역에서 성능을 알아보기 위해 모의 실험하였고, 실제로 구현을 하여 측정결과를 비교해 보았다. LTCC 기판위에 인덕터를 구현 하였을 때 실리콘, 유리 기판위에 인덕터를 구현하였을 때보다 더 높은 Q 값을 측정할 수 있었다. 5GHz 대역에서 실리콘, 유리, LTCC 기판에서 각각 12, 33, 51에 값을 확인할 수 있었다.