• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.1
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• pp.50-57
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• 2022

Reliability of CMOS has been severed under aggressive device scaling. Conventional technologies such as lightly doped drain (LDD) and forming gas annealing (FGA) have been applied for better device reliability, but further advances are modest. Alternatively, electro-thermal annealing (ETA) which utilizes Joule heat produced by electrodes in a MOSFET, has been newly introduced for gate dielectric curing. However, concerns about mechanical stability during the electro-thermal annealing, have not been discussed, yet. In this context, this paper demonstrates the mechanical stability of nanosheet FET during the electro-thermal annealing. The effect of mechanical stresses during the electro-thermal annealing was investigated with respect to device design parameters.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.246-254
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• 2022

Localized heat can be generated using electrically conductive word-lines built into a 3D NAND flash memory string. The heat anneals the gate dielectric layer and improves the endurance and retention characteristics of memory cells. However, even though the electro-thermal annealing can improve the memory operation, studies to investigate material failures resulting from electro-thermal stress have not been reported yet. In this context, this paper investigated how applying electro-thermal annealing of 3D NAND affected mechanical stability. Hot-spots, which are expected to be mechanically damaged during the electro-thermal annealing, can be determined based on understanding material characteristics such as thermal expansion, thermal conductivity, and electrical conductivity. Finally, several guidelines for improving mechanical stability are provided in terms of bias configuration as well as alternative materials.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1430-1432
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• 2009

The effect of different annealing methods on the sheet resistance of indium tin oxide (ITO) on polyimide (PI) substrate has been investigated. As electro-annealing induced the predominant growth of crystallites of ITO thin films along (400) plane, the sheet resistance of ITO films that were electro-annealed for 2 mA at $180^{\circ}C$ considerably decreased from 50 to 28 ${\Omega}/cm^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.1
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• pp.23-28
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• 2023

This paper demonstrates a novel NAND flash memory structure and annealing configuration including through-silicon via (TSV) inside the silicon substrate to improve annealing efficiency using an electro-thermal annealing (ETA) technique. Compared with the conventional ETA which utilizes WL-to-WL current flow, the proposed annealing method has a higher annealing temperature as well as more uniform heat distribution, because of thermal isolation on the silicon substrate. In addition, it was found that the annealing temperature is related to the electrical and thermal conductivity of the TSV materials. As a result, it is possible to improve the reliability of NAND flash memory. All the results are discussed based on 3-dimensional (3-D) simulations with the aid of the COMSOL simulator.

• Korean Journal of Materials Research
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• v.19 no.9
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• pp.499-503
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• 2009

Transparent ITO films were deposited on a polycarbonate substrate with RF magnetron sputtering in a pure argon (Ar) and oxygen ($O_2$) gas atmosphere, and then post deposition electro annealed for 20 minutes in a $4{\times}10^{-1}$ Pa vacuum. Electron bombardment with an accelerating voltage of 100 V increased the substrate temperature to $120^{\circ}C$. XRD analysis of the deposited ITO films did not show any diffraction peaks, while electro annealed films indicated the growth of crystallites on the (211), (222), and (400) planes. The sheet resistance of ITO films decreased from 103 to $82{\Omega}/\square$. The optical transmittance of ITO films in the visible wavelength region increased from 85 to 87%. Observation of the work function demonstrated that the electro-annealing increased the work function of ITO films from 4.4 to 4.6 eV. The electro annealed films demonstrated a larger figure of merit of $3.0{\times}10^{-3}{\Omega}^{-1}$ than that of as deposited films. Therefore, the electro annealed films had better optoelectrical performances than as deposited ITO films.

• Korean Journal of Materials Research
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• v.14 no.8
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• pp.552-557
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• 2004

Thin Ni-B films, 1 ${\mu}m$ thick, were electrolessly deposited on Cu bus electrode fabricated by electro deposition. The purpose of these films is to encapsulate Cu electrodes for preventing Cu oxidation and to serve as a diffusion barrier against copper contamination of dielectric layer in AC-plasma display panel. The layers were heat treated at $580^{\circ}C$(baking temperature of dielectric layer) with and without pre-annealing at $300^{\circ}C$($Ni_{3}B$ formation temperature) for 30 minutes. In the layer with pre-annealing, amount of Cu diffusion was lower about 5 times than that in the layer without pre-annealing. The difference of Cu concentration could be attributed to Cu diffusion before $Ni_{3}B$ formation at grain boundaries. However, the diffusion behavior of the layer with pre-annealing was similar to that of the layer without pre-annealing after $Ni_{3}B$ formation. With increasing annealing time, Cu concentration of both layers increased due to grain growth.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.367-369
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• 1988

We suggest a new annealing method for stabilization of $Si-SiO_2$ interface state in MOS device using $NH_3$(10%) + $N_2$(90%) ambient gases. The annealing effect was examined through C-V characteristics, threshold voltage, effective mobility on channel, respectively. The experimental result show that the new method is available to improvement of MOS device characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.418-419
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• 2006

We investigate the influence of the ambient gas during thermal annealing on the photoluminescence (PL) properties of europium-silicate thin films. The films were fabricated on substrates by using a radio-frequency magnetron sputtering method and subsequent rapid thermal annealing (RTA). The mechanism for the formation of the europium silicates during the annealing process was investigated by using X-ray diffraction (XRD) spectroscopy, Auger electron spectroscopy (AES) and transmission electron microscopy (TEM). A series of narrow PL spectra from $Eu^{3+}$ ions was observed from the film annealed in $O_2$ ambient. Broad PL spectra associated with $Eu^{2+}$ ions, with a maximum intensity at 600 nm and a FWHM of 110 nm, were observed from the thin film annealed at $1000^{\circ}C$ in $N_2$ ambient.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.3
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• pp.184-188
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• 2014

The electro-optic properties in Langmuir Blodgett films of poly (vinylidene fluoride trifluoroethylene) are investigated in the crossover region between two and three dimensions. The absence of finite size effect is observed in the films thinner than 20 nm, which confirms that these films are two dimensional ferroelectrics. The copolymer LB film of P(VDF-TrFE) exhibits the largest electro-optic response(26 pm/V) at 10 layer thickness. The cross-over behavior of electro-optic effect around the 10 layer thickness was discussed with the formation of nanomesa after thermal annealing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.316-316
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• 2008

Using an evaporation method, $SiO_2$ was deposited as a buffer layer between a flexible PET substrate and a ITO film deposited by DC magnetron sputtering and electro-optical properties were investigated with thickness variance of $SiO_2$ layers. After coating a $SiO_2$ layer and a ITO film, the ITO/$SiO_2$/PET was heated up to $200^{\circ}C$ and the resistivity and the transmittance were measured by hall effect measurement system and UV/VIS/NIR spectroscopy. As a result of depositing a $SiO_2$ buffer layer, the resistivity increased and the transmittance and adhesion property were enhanced than ITO films with no buffer layers and the resistivity was lowered as $SiO_2$ thickness increased from 50 $\AA$ to 100 $\AA$. It was found that the transmittance was independent of annealing temperature variance in $150^{\circ}C{\sim}200^{\circ}C$ and the resistivity decreased as the temperature increased and especially decreasing rate of the resistivity was higher as the buffer layer thickness was thinner. So under optimized depositing of $SiO_2$ buffer layers and post-annealing of ITO/$SiO_2$/PET, ITO films with enhanced adhesion, electro-optical properties can obtained.