• Journal of Electrical Engineering and Technology
• /
• 제2권1호
• /
• pp.61-67
• /
• 2007

In this article, a special kind of axial flux permanent magnet machine has proved to be suitable for high torque and low speed applications. An innovative design of the machine has been proposed in order to make the machine suitable for traction applications by means of field-weakening. The aim of this paper is to analyze, in general terms, the basic equations that describe the operating conditions of such machines. Optimal sizes for design can be obtained by calculating the power density and the air-gap flux density, etc.

• Journal of Electrical Engineering and Technology
• /
• 제13권1호
• /
• pp.326-332
• /
• 2018

In this paper, the design process and the control method of the power conversion system (PCS) that consists of a bidirectional DC-DC converter and a 3-level T-type inverter for an energy storage system is presented. Especially the design method of the output LCL filter for a 3-lvel T-type inverter without complex mathematical process are proposed. The validity of the control method and design process in this paper are verified through simulation and experimental analysis.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 하계학술대회 논문집 C
• /
• pp.1990-1992
• /
• 2003

This paper, Design formula of Bandpass Filter Using Inductive Coupled 2-pole SIR(Step Impedance Resonator) is supposed. General Filter Design Theory of Step Impedance Resonator is presented. Bandpass Filter using Inductive Coupled 2-pole SIR have been designed at 5.8Ghz band frequency for WLAN(Wireless Local Area Network). Simulation have used Circuit Simulation. We were showed excellent agreements between SR design theory and simulation results.

• Journal of Computing Science and Engineering
• /
• 제12권1호
• /
• pp.24-35
• /
• 2018

Deep convolutional neural network (DCNN) is an advanced technology in image recognition. Because of extreme computing resource requirements, DCNN implementation with software alone cannot achieve real-time requirement. Therefore, the need to implement DCNN accelerator hardware is increasing. In this paper, we present a field programmable gate array (FPGA)-based hardware accelerator design of DCNN targeting handwritten Hangul character recognition application. Also, we present design optimization techniques in SDAccel environments for searching the optimal FPGA design space. The techniques we used include memory access optimization and computing unit parallelism, and data conversion. We achieved about 11.19 ms recognition time per character with Xilinx FPGA accelerator. Our design optimization was performed with Xilinx HLS and SDAccel environment targeting Kintex XCKU115 FPGA from Xilinx. Our design outperforms CPU in terms of energy efficiency (the number of samples per unit energy) by 5.88 times, and GPGPU in terms of energy efficiency by 5 times. We expect the research results will be an alternative to GPGPU solution for real-time applications, especially in data centers or server farms where energy consumption is a critical problem.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2009년도 춘계학술대회 논문집 에너지변화시스템부문
• /
• pp.6-8
• /
• 2009

This paper presents the novel implementation of memetic algorithm with GA (Genetic Algorithm) and MADS (Mesh Adaptive Direct Search), which is applied for optimal design methodology of electric machine. This hybrid algorithm has been developed for obtaining the global optimum rapidly, which is effective for optimal design of electric machine with many local optima and much longer computation time. In particular, the proposed memetic algorithm has been forwarded to optimal design of direct-driven PM wind generator for maximizing the Annual Energy Production (AEP), of which design objective should be obtained by FEA (Finite Element Analysis). After all, it is shown that GA combined with MADS has contributed to reducing the computation time effectively for optimal design of PM wind generator when compared with purposely developed GA implemented with the parallel computing method.

• 전기학회논문지
• /
• 제62권1호
• /
• pp.37-42
• /
• 2013

This paper deals with Wound Rotor Synchronous Motor (WRSM) purposely designed for Integrated Starter and Generator (ISG) installed in 42V automotive electrical system. Not only design objective and specifications of WRSM, but its adaptive design to minimize torque ripple and back-EMF Total Harmonics Distortion (THD) are considered. Furthermore, design characteristics of designed prototype have been investigated numerically in terms of torque, back EMF, loss, and efficiency, which are verified by performance comparison with Interior Permanent Magnet Synchronous Machine based on Finite Element Analysis (FEA).

• Journal of Electrical Engineering and Technology
• /
• 제11권5호
• /
• pp.1466-1474
• /
• 2016

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2008년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
• /
• pp.107-108
• /
• 2008

This article describes optimization for PGS(Patterned Ground Shield) of rectangular spiral inductor using Taguchi's Design of Experiment. PGS is decrease method of parasite component by silicon substrate among dielectric loss reduction method. Using taguchi's design of experiment, each parameter is fixed upon that PGS high poison(A), slot spacing(B), strip width(C) and overlap turn number(D) of PGS design parameter. Then we verified that percentage contribution and design sensitivity analysis of each parameter and level by signal to noise ratio of larger-the-better type. We consider percentage contribution and design sensitivity of each parameter and level, and then verify that model of optimization for PGS is lower inductance decreasing ratio and higher Q-factor increasing ratio by EM simulation.

• Journal of Computing Science and Engineering
• /
• 제6권4호
• /
• pp.257-266
• /
• 2012

This paper overviews clock design problems related to the circuit reliability in deep submicron design technology. The topics include the clock polarity assignment problem for reducing peak power/ground noise, clock mesh network design problem for tolerating clock delay variation, electromagnetic interference aware clock optimization problem, adjustable delay buffer allocation and assignment problem to support multiple voltage mode designs, and the state encoding problem for reducing peak current in sequential elements. The last topic belongs to finite state machine (FSM) design and is not directly related to the clock design, but it can be viewed that reducing noise at the sequential elements driven by clock signal is contained in the spectrum of reliable circuit design from the clock source down to sequential elements.

• Journal of Electrical Engineering and Technology
• /
• 제12권6호
• /
• pp.2342-2347
• /
• 2017

In this study, we design a reconfigurable frequency selective surface (FSS) using fluidic channels to use the FSS in multi-frequencies. Effective permittivity can be changed using water as the fluid of fluidic channels in a dielectric slab, and the frequency characteristics of FSS can be controlled. We optimize the dimensions of the fluidic channel to design a reconfigurable FSS and measure its transmission characteristics.