• Title/Summary/Keyword: Electric flash

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Virtual Lecture for Digital Logic Circuit Using Flash (플래쉬를 이용한 디지털 논리회로 교육 콘텐츠)

  • Lim Dong-Kyun;Cho Tae-Kyung;Oh Won-Geun
    • The Journal of the Korea Contents Association
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    • v.5 no.4
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    • pp.180-187
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    • 2005
  • In this paper, we developed an online lecture for digital logic circuit which is a basic course in electric/electronic education. Because of importance of the laboratory experiences in this course and to reflect industrial requests, we have selected most effective experimental examples in each chapter and inserted instructions for basic usags of ORCAD and digial clock design. Moreover, we developed cyber lab to design students' own circuit using Flash animation. Two features of this cyber lab are real-like graphics for devices and breadboards to improve reality and patented new IC chip objects for easy experiments, which help the students understand digital logic easily.

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The Short Channel Effect Immunity of Silicon Nanowire SONOS Flash Memory Using TCAD Simulation

  • Yang, Seung-Dong;Oh, Jae-Sub;Yun, Ho-Jin;Jeong, Kwang-Seok;Kim, Yu-Mi;Lee, Sang Youl;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.3
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    • pp.139-142
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    • 2013
  • Silicon nanowire (SiNW) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices were fabricated and their electrical characteristics were analyzed. Compared to planar SONOS devices, these SiNW SONOS devices have good program/erase (P/E) characteristics and a large threshold voltage ($V_T$) shift of 2.5 V in 1ms using a gate pulse of +14 V. The devices also show excellent immunity to short channel effects (SCEs) due to enhanced gate controllability, which becomes more apparent as the nanowire width decreases. This is attributed to the fully depleted mode operation as the nanowire becomes narrower. 3D TCAD simulations of both devices show that the electric field of the junction area is significantly reduced in the SiNW structure.

A Numerical Study of NAND Flash Memory on the cooling effect (낸드플래시 메모리의 냉각효과에 관한 수치적 연구)

  • Kim, Ki-Jun;Koo, Kyo-Woog;Lim, Hyo-Jae;Lee, Hyouk
    • 한국전산유체공학회:학술대회논문집
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    • 2011.05a
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    • pp.117-123
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    • 2011
  • The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

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Effects of Offset Gate on Programing Characteristics of Triple Polysilicon Flash EEPROM Cell

  • Kim, Nam-Soo;Choe, Yeon-Wook;Kim, Yeong-Seuk
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.132-138
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    • 1997
  • Electrical characteristics of split-gate flash EEPROM with triple polysilicon is investigated in terms of effects of floating gate and offset gate. In order to search for t the effects of offset gate on programming characteristics, threshold voltage and drain current are studied with variation of control gate voltage. The programming process is believed to depend on vertical and horizontal electric field as well as offset gate length. The erase and program threshold voltage are found to be almost constant with variation of control gate voltage above 12V, while endurance test indicates degradation of program threshold voltage. With increase of offset gate length, program threshold voltage becomes smaller and the drain source voltage just after program under constant control gate voltage becomes higher.

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Memory Characteristics of Al2O3/La2O3/SiO2 Multi-Layer Structures for Charge Trap Flash Devices (전하 포획 플래시 소자를 위한 Al2O3/La2O3/SiO2 다층 박막 구조의 메모리 특성)

  • Cha, Seung-Yong;Kim, Hyo-June;Choi, Doo-Jin
    • Korean Journal of Materials Research
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    • v.19 no.9
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    • pp.462-467
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    • 2009
  • The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study, Pt/$Al_2O_3/La_2O_3/SiO_2$/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memory device applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operations and reduced charge transports through blocking oxide layers. The thicknesses of $SiO_2$ were from 30 $\AA$ to 50 $\AA$. From the C-V measurement, the largest memory window of 1.3V was obtained in the 40 $\AA$ tunnel oxide specimen, and the 50 $\AA$ tunnel oxide specimen showed the smallest memory window. In the cycling test for reliability, the 30 $\AA$ tunnel oxide sample showed an abrupt memory window reduction due to a high electric field of 9$\sim$10MV/cm through the tunnel oxide while the other samples showed less than a 10% loss of memory window for $10^4$ cycles of program/erase operation. The I-V measurement data of the capacitor structures indicated leakage current values in the order of $10^{-4}A/cm^2$ at 1V. These values are small enough to be used in nonvolatile memory devices, and the sample with tunnel oxide formed at $850^{\circ}C$ showed superior memory characteristics compared to the sample with $750^{\circ}C$ tunnel oxide due to higher concentration of trap sites at the interface region originating from the rough interface.

Effect of Dispersion Technique on Heat Transfer Properties of Transformer Oil with Nanoparticles (변압기 나노절연유의 열전달특성에 미치는 분산기술의 영향)

  • Song, Hyun-Woo;Choi, Cheol;Oh, Je-Myung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.11a
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    • pp.151-152
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    • 2005
  • Both $Al_2O_3$ and AlN nanopowders with diameters from ${\mu}m$ to mm were bead-milled and surface-modified by stabilizing agent. The size of bead-milled nanoparticles compared with the primary powder was effectively decreased and was dependent on milling time and bead size. The results of dispersion stability analysis indicated that chemical bonding between nanoparticles and surfactant is more effective than chemical adsorption to prepare the stable transformer oils containing nanoparticles. In this study, the thermal conductivity of the transformer oils containing nanoparticles was measured by transient hot-wire and laser flash methods.

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A Study on the Marine Lattern Development using Light Emitting Diodes (해상용 LED(Light Emitting Diode) 등명기 연구개발)

  • Jeong, Hak-Geun;Jung, Bong-Man;Han, Su-Bin;Yu, Seong-Won;Kim, Hoon
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.167-170
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    • 2004
  • A high light lantern system using LEDs is composed of power supply, flash controller, and daylight controller and proper case considering work condition. The performance of developed LED lantern is better than that of the existing marine lantern using an incandescent electric lamp and that of foreign products(Vega LED lantern made in New Zealand, Tideland system made in America). The electric consumption of our products is 30% compared with that of existing marine lantern using an incandescent electric lamp, and the luminous Intensity of them is 200% to 400% compared with that of existing marine lantern and foreign LED lantern. In addition, our LED lantern system is easy to repairing something wrong and changing the LED module and other controllers on the sea when they are in accident.

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Measurement and Prediction of Combustion Characteristics of DEC(Diethyl Carbonate) + DMMP(Dimethyl Methylphosphonate) for Secondary Battery Solutions (2차전지 용액인 DEC(Diethyl Carbonate) + DMMP(Dimethyl Methylphosphonate)계의 연소특성치 측정 및 예측)

  • Y. S. Jang;Y. R. Jang;J. J. Choi;D. J. Jeon;Y. G. Kim;D. M. Ha
    • Journal of the Korean Society of Safety
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    • v.38 no.5
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    • pp.8-14
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    • 2023
  • Lithium ions can induce the thermal runaway phenomenon and lead to reignition due to electrical, mechanical, and environmental factors such as high temperature, smoke generation, explosions, or flames, which is extremely likely to create safety concerns. Therefore, one of the ways to improve the flame retardancy of the electrolyte is to use a flame-retardant additive. Comparing the associated characteristic value of existing substances with the required experimental value, it was found that these values were either considerably different or were not documented. It is vital to know a substance's combustion characteristic values, flash point, explosion limit, and autoignition temperature (AIT) as well as its combustion characteristics before using it. In this research, the flash point and AIT of materials were measured by mixing a highly volatile and flammable substance, diethyl carbonate (DEC), with flame-retardant dimethyl methylphosphonate (DMMP). The flash point of DEC, which is a pure substance, was 29℃, and that for DMMP was 65℃. Further, the lower explosion limit calculated using the measured flash point of DEC was 1.79 Vol.%, while that for DMMP was 0.79 Vol.%. The AIT was 410℃ and 390℃ for DEC and DMMP, respectively. In particular, since the AIT of DMMP has not been discussed in any previous study, it is necessary to ensure safety through experimental values. In this study, the experimental and regression analysis revealed that the average absolute deviation (ADD) for the flash point of the DEC+DMMP DEC+DMMP system is 0.58 sec and that the flash point tends to increase according to changes in the composition employed. It also revealed that the AAD for the AIT of the mixture was 3.17 sec and that the AIT tended to decrease and then increase based on changes in the composition.

A Study on the PbO Thin Films (PbO 박막에 대한 연구)

  • 정창섭
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.6
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    • pp.39-42
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    • 1978
  • Orthorhombic yellow PbO thin films were prepared by evaporating PbO powder in vacuum and annealed in air. The evaporation was carried out by Hashing method. The energy gap, the type of electric conduction and the grain size of these films were 2.63eV, f type, and 670 nm respectively.

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Word Speech Recognition System by Using TMS320C6711 (TMS320C6711을 이용한 어휘 인식기)

  • 최지혁;김상준;홍광석
    • Proceedings of the IEEK Conference
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    • 2003.07e
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    • pp.2240-2243
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    • 2003
  • In this paper. we present a new speech recognition system using DSP chip. DSP chip used TMS320c6711 of TI. We designed hardware system including acoustic model, word list and code book in flash memory. The word candidates are recognized based on CV, VCCV, and VC units HMM. This system can be applied to various electric & electronic devices: home automation, robotics etc.

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