• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1B
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• pp.41-51
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• 2004

Operation and maintenance (OAM) in optical burst switching (OBS) networks has not yet been addressed even though OBS has been gaining research interest in recent years. In this paper, we defined five OBS functions such as Burst Termination (BT), Burst Transmission (BTX), Burst Switching (BSW), Routing and Switching Control (RSC), and Protection and Restoration (PAR). A functional model for OBS networks and an OAM architecture are designed to meet the operational requirements. We present the first framework to realize OAM in OBS networks, including OAM activities, OAM-capable OBS nodes such as ingress edge, core, and egress edge nodes, OAM information and communication models and protocols. A number of examples of possible network failures are pointed out and the corresponding reactions to these using the proposed OAM architecture are presented.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.5
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• pp.364-367
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• 2010

The dual ion-implantation trench edge termination techniques were investigated and optimized using a two-dimensional device simulator. By trenching the field ring site which would be dual implanted, a better blocking capability can be obtained. The results show that the p-n junction with dual implanted junction field-ring can accomplish nearly 20% increase of breakdown voltage in comparison with the conventional trench field-rings. The fabrication is relatively difficult. But the trench etched field ring with dual ion-implantation is surpassed for breakdown voltage and consume same area and extensive device simulations as well as qualitative analysis confirm these conclusions.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.110-110
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• 2011

현재 전력 반도체는 신재생/대체 에너지 시스템, 자동차/전기자동차, 디스플레이/LED 드라이브 IC 등과 같이 산업용뿐만 아니라 가정용에서도 그 수요가 급증하고 있다. 이러한 전력 반도체는 각 시스템에서 전력 변환, 분배 및 관리를 하는 역할을 하게 되는데, 이러한 전력 시스템에 적용되기 위해서는 고속 스위칭, 낮은 전력 손실 및 발열, 소형화 등의 특성이 요구되어진다. 이러한 특성을 만족하기 위해 현재 전력반도체는 수평형 소자에서 수직 형태로의 구조적 변경을 꽤하고 있으며, 또한 수직형 구조에서도 더욱 소형화와 고밀도 전류, 낮은 전력 손실 특성을 구현하기 위해 여러 가지 형태의 어레이 기술을 개발하고 있다. 본 연구에서는 사각 형태의 어레이 (square array, mesh type)를 가지는 수직형 TDMOS (Trench double diffused metal oxide effect transistor)에서 트렌치 부분을 중심으로 액티브 영역과 그 외각 영역의 도핑 농도와 접합 깊이의 변화에 따른 전기적 특성 변화를 파악함으로써 TDMOS의 안정적인 구동 영역을 확보하기 위한 연구를 수행하였다. 본 연구는 silvaco 시뮬레이션 툴을 이용하여 실제 소자 제작 공정과 유사한 형태로의 공정을 가상적으로 진행하고, 액티브 영역과 그 외각 영역의 도핑 및 접합 깊이를 결정하는 이온 주입량과, 후속 열처리의 온도와 시간 등을 변화함으로써 그 전기적 특성을 상호 비교하였다.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.155-160
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• 2023

The potential performance benefits of Silicon Carbide(SiC) MOSFETs in high power, high frequency power switching applications have been well established over the past 20 years. In the past few years, SiC MOSFET offerings have been announced by suppliers as die, discrete, module and system level products. In high-voltage SiC vertical devices, major design concerns is the edge termination and cell pitch design Field Limiting Rings(FLR) based structures are commonly used in the edge termination approaches. This study presents a comprehensive analysis of the impact of variation of FLR and JFET region on the performance of a 3.3 kV SiC MOSFET during. The improvement in MOSFET reverse bias by optimizing the field ring design and its influence on the nominal operating performance is evaluated. And, manufacturability of the optimization of the JFET region of the SiC MOSFET was also examined by investigating full-map electrical characteristics.

• Computational Structural Engineering
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• v.10 no.3
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• pp.185-193
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• 1997

The order of the stress singularity that occurs at the termination of an interface between materials exhibiting bilinear stress-strain response under plane strain conditions has been calculated, The governing equation of elasticity together with traction-free boundary condition and interface continuity condition defines a two-point boundary value problem. The stress components near the free edge are assumed to be proportional to r/sup s-1/, with solutions existing only for certain values of s. Finding these values entails the solution of an eigenvalue problem. Because it has been impossible to integrate the differential equations analytically, the integration has been performed numerically with a shooting method coupled with a Newton improvement scheme.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.834-838
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• 2002

In this paper, we have fabricated 4H-SiC schottky diodes utilizing a metal-oxide overlap structure for electric filed termination. The barrier height and Ideality factor were measured by current-voltage, capacitance-voltage characteristics. Schottky barrier height(SBH) were 1.41ev for Ni and 1.35eV for Pt, 1.52eV for Pt/Ti at room temperature and Pt/Ti Schottky diode exhibited Ideality factor was 1.06 to 1.4 in the range of $25^{\circ}C{\sim}200^{\circ}C$. To improve the reverse bias characteristics, an edge termination technique is employed for Pt/Ti/4H-SiC Schottky rectifiers and the device show excellent characteristics with higher blocking voltage up to 780V compared with unterminated devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.10
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• pp.877-882
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• 2005

In order to fabricate a high breakdown SiC-SBD (Schottky barrier diode), we investigate an effect on metal guard ring (MGR) in breakdown characteristics of the SiC-SBD. The breakdown characteristics of MGR-type SiC-SBD is significantly dependent on both the guard ring metal and the alloying time of guard ring metal. The breakdown characteristics of MGR-type SiC-SBDs are essentially improved as the alloying time of guard ring metal is increased. The SiC-SBD without MGR shows less than 200 V breakdown voltage, while the SiC-SBD with Al MGR shows approximately 700 V breakdown voltage. The improvement in breakdown characteristics is attributed to the field edge termination effect by the MGR, which is similar to an implanted guard ring-type SiC-SBD. There are two breakdown origins in the MGR-type SiC-SBD. One is due to a crystal defects, such as micropipes and stacking faults, in the Epi-layers and the SiC substrate, and occurs at a lower electric field. The other is due to the destruction of guard ring metal, which occurs at a higher electric field. The demolition of guard ring metal is due to the electric field concentration at an edge of Schottky contact metal.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.3
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• pp.165-169
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• 2012

Power semiconductor devices are widely used as high voltage applications to inverters and motor drivers, etc. The blocking voltage is one of the most important parameters for power semiconductor devices. And cause of junction curvature effects, the breakdown voltage of the device edge and device unit cells was found to be lower than the 'ideal' breakdown voltage limited by the semi-infinite junction profile. In this paper, Propose the methods for field ring design by DOE (Design of Experimentation). So The field ring can be improve for breakdown voltage and optimization.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.14-21
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• 2009

A digital differential transmitter based on CMOS inverter worked up to 2.8 Gbps at the supply voltage of 1 V with a $0.18{\mu}m$ CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver are compensated by the calibration of the rising-edge delay and falling-edge delay of the pre-driver outputs. The chip fabricated with a $0.18{\mu}m$ CMOS process, which uses the standard supply voltage of 1.8 V, gives the highest data rate of 4Gbps at the supply voltage of 1.2 V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at 2.8 Gbps and 1 V.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.11-16
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• 2016

Silicon carbide (SiC) has received significant attention over the past decade because of its high-voltage, high-frequency and high-thermal reliability in devices compared to silicon. Especially, a SiC Schottky barrier diode (SBD) is most often used in low-voltage switching and low on-resistance power applications. However, electric field crowding at the contact edge of SBDs induces early breakdown and limits their performance. To overcome this problem, several edge termination techniques have been proposed. This paper proposes an improvement in the breakdown voltage using a double-field-plate structure in SiC SBDs, and we design, simulate, fabricate, and characterize the proposed structure. The measurement results of the proposed structure, demonstrate that the breakdown voltage can be improved by 38% while maintaining its forward characteristics without any change in the size of the anode contact junction region.