• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.139-141
• /
• 2008

This paper presents a PID controller and PI-PI dual loop controller for a single-phase inverter. The control parameters of conventional controllers are very difficult to make. But parameters of controllers based on pole-assignment are easy to make. Simulation results are presented for the system under R-L load, no load and change reference voltage.

• 제어로봇시스템학회:학술대회논문집
• /
• 1993.10a
• /
• pp.161-167
• /
• 1993

This paper presents robustness properties of the Kalman Filter ad the associated LQG/LTR method for linear time-invariant systems having delays in both the state and output. A circle condition relating to the return difference matrix associated with the Kalman filter is derived. Using this circle condition, it is shown that the Kalman filter guarantees(1/2, .inf.) gain margin and .+-.60.deg. phase margin, which are the same as those for nondelay systems. However, it is shown that, even for minimum phase plants, the LQG/LTR method can not recover the target loop transfer function. Instead, an upper bound on the recovery error is obtained using an upper bound of the solution of the Kalman filter Riccati equations. Finally, some dual properties between output-delated system and input-delayed systems are exploited.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.33A no.10
• /
• pp.115-122
• /
• 1996

A 300MHz PLL including FVC (frequency to voltage converter) is designed and fabricated in 0.8$\mu$m CMOS process. In this design, a FVC and a 2nd - order passive filter are added to the conventional charge-pump PLL to improve the acquisition time. The dual-rijng VCO(voltage controlled oscillator) realized in this paper has a frequency range form 208 to 320MHz. Integrated circuits have been fully tested and analyzed in detail and it is proved that pull-in speed is enhanced with the use fo FVC. In VCO range from 230MHz to 310MHz, experimental results show that realized PLL exhibits 4 times faster pull-in speed than that of conventional PLL.

• Electronics and Telecommunications Trends
• /
• v.13 no.5 s.53
• /
• pp.53-64
• /
• 1998

본 고에서는 한파장 폐루프 공진기의 기본특성과 이를 활용한 이중모드 필터 구조 및 필터의 주요특징을 기술하였다. 또한 독립적인 직교공진모드를 이용한 폐루프 공진기의 특성과 공진기의 크기를 소형화 하는 기법 및 소형화 된 공진기의 공진조건 등을 기술하였고, 소형화 된 공진기를 이용한 듀플렉서의 응용 예 등에 대해 기술하였다. 폐루프 공진기를 이용한 이중모드필터 등은 마이크로 스트립 형태로 구현이 가능하기 때문에 MIC 또는 MMIC 등에 적합한 구조이며, 능동소자 등의 삽입이 가능하기 때문에 능동필터, VCO, 튜닝필터 등의 구현이 가능하고 소형의 듀플렉서 설계가 가능하기 때문에 향후 마이크로파 부품분야에서 기대되는 부품이라 할 수 있다.

• Transactions on Control, Automation and Systems Engineering
• /
• v.4 no.4
• /
• pp.311-318
• /
• 2002

Two adaptive nonlinear friction compensation schemes are proposed for second-order nonlinear mechanical systems with a partially known nonlinear dynamic friction model to achieve asymptotic position and velocity tracking. The first scheme has auxiliary filtered states so that a simple open-loop observer can be used. The second one has a dual-observer structure to estimate two different nonlinear aspects of the friction state. Conditions for the parameter estimates to converge to the true parameter values are presented. Simulation results are utilized to show control performance and to demonstrate the convergence of the parameter estimates to their true values.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.4
• /
• pp.227-233
• /
• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• Journal of computational fluids engineering
• /
• v.10 no.2
• /
• pp.60-68
• /
• 2005

For study on the unsteady wall interference effect, flows around a forced oscillating airfoil in closed test-section wind tunnels have been numerically investigated by solving compressible Navier-Stokes equations. The numerical scheme is based on a node-based finite-volume method with the Roe's flux-difference splitting and an implicit time-integration method coupled with dual time-step sub-iteration. The Spalart-Allmaras one-equation model is employed for the turbulence effect. The computed results of the oscillating airfoil having a thin wake showed that the lift curve slope is increased and the magnitude of hysteresis loop is reduced by the interference effects. Since the vortex around the airfoil is generated and convected downstream faster than the free-air condition, the phase of lift, drag and pitching moment coefficients was shifted. The pressure on the test section wall shows harmonic terms having the oscillating frequency contained in the wail effect.

• Journal of Power Electronics
• /
• v.12 no.3
• /
• pp.458-467
• /
• 2012

Single phase converters suffer from ripple power pulsating at twice the line frequency. The ripple power is usually absorbed by a bulky capacitor bank and/or a dedicative LC resonant link, resulting in a low power density and a high cost. An alternative solution is using a dc link active power filter (APF) to direct the pulsating power into another energy-storage component. The main dc link filter capacitor can then be reduced substantially. Based on a mainstream dc APF topology, this paper proposed a new control strategy incorporating both dual-loop control and repetitive control. The circuit parameter design is also re-examined from a control point of view. The proposed APF scheme has better control performance, and is more suited for high power applications since it works in CCM and with a low switching frequency.

• Proceedings of the KIPE Conference
• /
• 2018.07a
• /
• pp.54-56
• /
• 2018

본 논문은 평균 전류 분담 기법을 적용한 UPS(Uninterruptible Power Supply) 시스템의 병렬 운전 기법을 제안한다. 각각의 UPS는 전류 정보를 공유하기 위하여 CAN 통신을 사용하며, 이중 루프 방식의 전압, 전류제어기로 구성되어 있다. UPS의 전류 분담 성능을 내부 전류 제어기의 피드백 전류인 인덕터 전류, 커패시터 전류 그리고 통신 시지연에 따라 영향을 분석하고 3상 30kVA급 UPS에 적용하여 그 유효성을 검증하였다.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.37 no.2
• /
• pp.130-137
• /
• 1988

The technique of dual-input describing function's synthesis is introduced and the construction of a nonlinear compensator, based on this technique, is proposed. A nonlinear compensator, describing a complex DIDF depending upon amplitude of the second sinusoidal input signal only, is also proposed, where the second sinusoidal input signal is supplied to the nonlinear compensator by external generator. This compensator, connected in a closed loop of the PI speed control of DC motor, can improve the speed response in view instability limit cycle, low speed response and disturbance of the dynamic shift of the Nyquist's critical point -1 + j O. It is verified theoretically that the improvement of speed response of DC motor using the proposed compensator is achieved by means of the dynamic shift of the Nyquist's critical point on the complex plane, and the speed characterstics of DC motor is to be tested through experiment for its performance.