• Title/Summary/Keyword: Double Hold

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Stable Control-rod Double Hold Method of Control Rod Drive Mechanism (원자로 제어봉구동장치의 안정적 제어봉 이중 유지 방법)

  • Cheon, Jong-Min;Kim, Choon-Kyung;Lee, Jong-Moo;Jung, Soon-Hyun;Kim, Seog-Ju;Kwon, Soon-Man
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.555-558
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    • 2003
  • When a fault relating to the urgent alarm occurs, we must prevent control rods from dropping and make one of two grippers in Control Rod Drive Mechanism (CRDM) grip the drive rod laking a control rod assembly. If a gripper with any problem is ordered to grip the drive rod, the gripper which cannot latch the rod stably will fail to take the rod. On the purpose of escaping this bad case, we order two grippers to hold the drive rod and enhance the reliability of holding control rods. This action is called the double hold. In the middle of the movement of the drive rod, the latching of the drive rod can cause friction between a gripper and the drive rod. This state may give damage to both the gripper and the drive rod. In this paper, we have devised the method which can have two grippers hold the drive rod more stably, without damaging the equipment.

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An Accurate Fully Differential Sample-and-Hold Circuit (정밀한 완전 차동 Sample-and-Hold 회로)

  • 기중식;정덕균;김원찬
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.3
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    • pp.53-59
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    • 1994
  • A new fully differential sample-and-hold circuit which can effectively compensate the offset voltage of an operational amplifier and the charge injection of a MOS switch is presented. The proposed circuit shows a true sample-and-hold function without a reset period or an input-track period. The prototype fabricated using a 1.2$\mu$m double-polysilicon CMOS process occupies an area of 550$\mu$m$\times$288$\mu$m and the error of the sampled ouput is 0.056% on average for 3V input at DC.

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High Speed, High Resolution CMOS Sample and Hold Circuit (고속, 고해상도 CMOS 샘플 앤 홀드 회로)

  • Kim Won-Youn;Park Kong-Soon;Park Sang-Wook;Yoon Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.545-548
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    • 2004
  • The paper describes the design of high-speed, high-resolution Sample-and-Hold circuit which shows the conversion rate 80MHz and the power supply of 3.3v with 0.35um CMOS 2-poly 4-metal process for high-speed, high resolution Analog-to-Digital Converter. For improving Dynamic performance of Sample-and-Hold, Two Double bootstrap switch and high performance operational amplifier with gain booster, which are used. and For physical stability of Sample and Hold circuit, reduces excess voltage of gate in bootstrap switch. Simulation results using HSPICE shows the SFDR of 71dB, 75dB in conversion rate of 80MHz result for two inputs(0.5Vpp, 10MHz and 1Vpp, 10MHz) and the power dissipation of 48mW at single 3.3V supply voltage.

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ON REVERSIBLE ℤ2-DOUBLE CYCLIC CODES

  • Nupur Patanker
    • Bulletin of the Korean Mathematical Society
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    • v.60 no.2
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    • pp.443-460
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    • 2023
  • A binary linear code is said to be a ℤ2-double cyclic code if its coordinates can be partitioned into two subsets such that any simultaneous cyclic shift of the coordinates of the subsets leaves the code invariant. These codes were introduced in [6]. A ℤ2-double cyclic code is called reversible if reversing the order of the coordinates of the two subsets leaves the code invariant. In this note, we give necessary and sufficient conditions for a ℤ2-double cyclic code to be reversible. We also give a relation between reversible ℤ2-double cyclic code and LCD ℤ2-double cyclic code for the separable case and we present a few examples to show that such a relation doesn't hold in the non-separable case. Furthermore, we list examples of reversible ℤ2-double cyclic codes of length ≤ 10.

CONJUGACY SEPARABILITY OF CERTAIN FREE PRODUCT AMALGAMATING RETRACTS

  • Kim, Goan-Su
    • Bulletin of the Korean Mathematical Society
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    • v.37 no.4
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    • pp.811-827
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    • 2000
  • We find some conditions to derive the conjugacy separability of the free product of conjugacy separable split extensions amalgamated along cyclic retracts. These conditions hold for any double coset separable groups and free-by-cyclic groups with nontrivial center. It was known that free-by-finite, polycyclic-by-finite, and fuchsian groups are double coset separable. Hence free products of those groups amalgamated along cyclic retracts are conjugacy separable.

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The Method of safe double holding by detecting movements of Control Rod Drive Mechanism (원자로 제어봉구동장치의 동작 검출을 통한 안전한 이중유지 방법)

  • Cheon, Jong-Min;Kinm, Choon-Kyung;Lee, Jong-Moo;Park, Min-Kook;Kwon, Soon-Man
    • Proceedings of the KIEE Conference
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    • 2005.07d
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    • pp.2655-2657
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    • 2005
  • When a fault relating to the urgent alarm occurs, we must prevent control rods from dropping and make one of two grippers in Control Rod Drive Mechanism (CRDM) grip the drive rod taking a control rod assembly. To enhance the reliability of holding control rods, we order two grippers to hold the drive rod. This action is called the double holding. In the middle of the movement of the drive rod, the latching of the drive rod can cause friction between a gripper and the drive rod. This state may give damage to both the gripper and the drive rod. In this paper, we have devised the method which can have two grippers hold the drive rod more stably, without damaging the equipment.

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Structural Strength and Fatigue Strength Assessment for Fore/Aft Cargo Hold of 60m Beam VLCC (60m Beam VLCC Fore/Aft Cargo Hold에 대한 구조 안정성 및 피로강도 평가)

  • Lee Sang-Woo;Choi J.H.;Kim M.S.;Kim M.S.;Lee Y.M.;Kim K.S.
    • Special Issue of the Society of Naval Architects of Korea
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    • 2005.06a
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    • pp.84-89
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    • 2005
  • The double hull VLCC(Very Large Crude Oil Tanker) have been designed to have each four(4) longitudinal bulkheads and transverse bulkheads in general. Actually, the inside longitudinal bulkheads among four(4) longitudinal bulkheads, which are extended up to the end of the aft cargo hold for continuity of the members, have been designed with knuckled type inboard due to the narrowed hull shape at bottom region, but sometimes the straight type of longitudinal bulkheads were adopted based on the degree of the hull lines shape. However, regardless the type of longitudinal bulkheads, inside and outside longitudinal bulkheads conflict each other in aft cargo hold region This makes the structure more complex thus giving difficulties to structural design and production. Recently, a vessel of straight type was reported to have cracks on bracket end and tripping bracket toe in aft cargo hold region. As a solution to this problem, in designing the first 60m Beam VLCC, DSME developed a new cargo hold structure which is good in production and structural point of view by structural strength and fatigue analysis of fore and aft cargo hold.

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Novel Frame Interpolation Method for High Image Quality LCDs

  • Itoh, Goh;Mishima, Nao
    • Journal of Information Display
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    • v.5 no.3
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    • pp.1-7
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    • 2004
  • We developed a novel frame interpolation method to interpolate a frame between two successive original frames. Using this method, we are able to apply a double-rate driving method instead of an impulse driving method where a black frame is inserted between two successive original frames. The double-rate driving method enables amelioration of the motion blur of LCDs caused by the characteristics of human vision without reducing the luminosity of the whole screen. The image quality of the double-rate driving method was also found to be better than that of an impulse driving method using our motion picture simulator and an actual panel. Our initial model of our frame interpolation method consists of motion estimation with a maximum matching pixel count estimation function, an area segmentation technique, and motion compensation with variable segmentation threshold. Although salt and pepper noise remained in a portion of an object mainly due to inaccuracy of motion estimation, we verified the validity of our method and the possibility of improvement in hold-type motion blurring.

Structural Design and Cost Evaluation of Double Hull Bulk Carrier (이중선체 벌크화물선의 선체구조설계 및 경제성 검토)

  • Song, H.C.;Yum, J.S.;Kim, B.I.
    • Journal of Power System Engineering
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    • v.9 no.2
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    • pp.106-111
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    • 2005
  • After many casualties of conventional bulk carriers in recent years, a double hull bulk carrier was proposed to enhance the structural safety of a side shell and a transverse bulkhead. In this paper, two alternative structural designs of a double hull bulk carrier were carried out based on the Lloyd's rule. One has the double sided hull with longitudinal stiffeners and the other has that with a girder. The final structural design was examined in comparison with an existing single hull bulk carrier from the viewpoints of cargo hold capacity and the increases of weight and construction cost. Generally, the construction cost of a ship consists of the costs of material, labor and overhead cost. But, in this study, the relative construction cost concept was introduced to compare the economical validity more precisely. In this concept, fixed overhead cost is excluded in the assessment of construction cost, and only the variable overhead cost is added up to labor cost. As the result of this study, a double hull bulk carrier can be constructed within 1% increase of weight and construction cost.

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A Low Power Dual CDS for a Column-Parallel CMOS Image Sensor

  • Cho, Kyuik;Kim, Daeyun;Song, Minkyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.388-396
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    • 2012
  • In this paper, a $320{\times}240$ pixel, 80 frame/s CMOS image sensor with a low power dual correlated double sampling (CDS) scheme is presented. A novel 8-bit hold-and-go counter in each column is proposed to obtain 10-bit resolution. Furthermore, dual CDS and a configurable counter scheme are also discussed to realize efficient power reduction. With these techniques, the digital counter consumes at least 43% and at most 61% less power compared with the column-counters type, and the frame rate is approximately 40% faster than the double memory type due to a partial pipeline structure without additional memories. The prototype sensor was fabricated in a Samsung $0.13{\mu}m$ 1P4M CMOS process and used a 4T APS with a pixel pitch of $2.25{\mu}m$. The measured column fixed pattern noise (FPN) is 0.10 LSB.