• 제목/요약/키워드: Display board

검색결과 258건 처리시간 0.03초

Circuit Integration Technology of Low-Temperature Poly-Si TFT LCDs

  • Motai, Tomonobu
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.75-80
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    • 2004
  • By the SOG (System-on-Glass) technology with excimer laser anneal process, the number of IC chips and the area of the mounted IC chips on the printed circuit board are reduced. In new circuit integrations on the glass substrate, we have developed D/A converter including the new capacitor array, amplifier comprising the original comparators and new display device with capturing images by integrated sensor into a pixel. This paper discusses the application of circuit integration of low-temperature poly-Si.

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VMS(Variable Message Signboard)의 서브 컨트롤부 설계 (Design of Sub Control Part for VMS(Variable Message Signboard))

  • 신재흥;이상철;문성창
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 전문대학교육위원
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    • pp.80-83
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    • 2004
  • Previously, in order to send information from the local controller to the display board, the hardware or software had to be handled and run through 3-phases, which include the PC-card or PC-add Board, I-F card and Sub board. This study will attempt to design a board that handles information by connecting the USB port of the PC directly to the Sub board. In addition, an MPU will be attached to the previously complex hardware circuit to design a software drive engine module, which allows for the development of new products by modifying only the software engine and not the hardware.

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가변형 교통 표지판의 서브 컨트롤부 구현 (Implementation of Sub Control Part for Variable Message Signboard)

  • 신재홍;김홍렬;이상기
    • 전기학회논문지P
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    • 제53권1호
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    • pp.7-13
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    • 2004
  • Previously, in order to send information from the local controller to the display board, the hardware or software had to be handled and run through 3-phases, which include the PC-card or PC-add Board, I/F card and Sub board. This study will attempt to design a board that handles information by connecting the USB port of the PC directly to the Sub board. In addition, an MPU will be attached to the previously complex hardware circuit to design a software drive engine module, which allows for the development of new products by modifying only the software engine and not the hardware.

A Link Layer Design for DisplayPort Interface

  • Jin, Hyun-Bae;Yoon, Kwang-Hee;Kim, Tae-Ho;Jang, Ji-Hoon;Song, Byung-Cheol;Kang, Jin-Ku
    • 전기전자학회논문지
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    • 제14권4호
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    • pp.297-304
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    • 2010
  • This paper presents a link layer design of DisplayPort interface with a state machine based on packet processing. The DisplayPort link layer provides isochronous video/audio transport service, link service, and device service. The merged video, audio main link, and AUX channel controller are implemented with 7,648 LUTs(Loop Up Tables), 6020 register, and 821,760 of block memory bits synthesized using a FPGA board and it operates at 203.32MHz.

선박 통합 모니터링을 위한 사용자 인터페이스 설계 가이드라인 (A User Interface Designing Guideline for Shipboard Integration Monitoring)

  • 황훈규;김태종;박휴찬;이장세;이서정
    • 디지털콘텐츠학회 논문지
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    • 제12권3호
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    • pp.391-396
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    • 2011
  • 최근 5년간, 해양 분야에서는 IT의 접목을 통한 안전운항이 큰 이슈가 되어왔다. 국제해사기구 NAV 위원회에서 정의하는 e-Navigation 전략이 수립되면, 기존 선내 다양한 정보는 필요와 목적에 따라 통합되어 사용되며, 그에 따른, 사용성 평가에 대한 논의가 시작되고 있다. 선박 정보 모니터링은 통합된 디스플레이를 사용하게 되며, 이를 위해서는, 표준에서 요구하는 사용성을 고려해야 한다. 이를 위하여, 본 논문에서는 선박 통합 모니터링을 위한 사용자 인터페이스 설계 가이드라인을 제시한다. 개념 및 요구 사항 분석 그리고 기존 제품의 분석을 바탕으로 선박 통합 모니터링을 위한 사용자 인터페이스 설계의 가이드라인을 제시한다.

고다층 보드 신뢰성 확보를 위한 베어보드 EMC 특성 연구 (A Study on the EMC Characteristics of Bare PCB for Reliability of High-Multilayer PCB)

  • 박진성;김기현;김경민;김성용
    • 반도체디스플레이기술학회지
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    • 제22권1호
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    • pp.94-98
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    • 2023
  • In the case of high-speed data transmission on high multilayer boards, signal coherence is a problem, especially due to the via hole, and a solution to improve return loss or insertion loss by applying a back drill to the via hole is being proposed. In this paper, Near-Field Electromagnetic measurements were made on a high multilayer board to determine how the presence or absence of back drill affects signal consistency. For this purpose, we used a signal generator, spectrum analyzer, and EMC scanner on a test board to determine if it is possible to distinguish between areas with and without back drill in the via holes of the stubs on the board. Also, we analyzed the measured value of S11, S21 and EMC etc. for how much it improves the signal attenuation of the stub with back drill. Through this, we knew that less electromagnetic waves are generated the stub via with back drill. At future research, we will analyze how much it improves the signal loss and electromagnetic waves due to the depth of back drill.

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범용 부품을 이용한 M-PHY AFE Block 개발 (Development of The M-PHY AFE Block Using Universal Components)

  • 최병선;오호형
    • 반도체디스플레이기술학회지
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    • 제14권2호
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    • pp.67-72
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    • 2015
  • For the development of UFS device test system, M-PHY specifications should be matched with MIPI-standard which is analog signal protocol. In this paper, the implementation methodology and hardware structure for the M-PHY AFE (Analog Front End) Block was suggested that it can be implemented using universal components without ASIC process. The testing procedure has a jitter problem so to solve the problems we using ASIC process, normally but the ASIC process needs a lot of developing cost making the UFS device test system. In is paper, the suggestion was verified by the output signal which was compared to the MIPI-standard on the Prototype-board using universal components. The board was reduced the jitter on the condition of HS-TX and 5.824 Gbps Mode in SerDes (Serialize-deserializer). Finally, the suggestion and developed AFE block have a useful better than ASIC process on developing costs of the industrial UFS device test system.

지능형 도로교통 제어기의 하드웨어 설계 (Hardware design of Intelligent Traffic Controller)

  • 서재관;이성의;오성남;박귀태;김갑일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 합동 추계학술대회 논문집 정보 및 제어부문
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    • pp.353-356
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    • 2002
  • 본 논문에서는 지능형 도로교통 제어기에 대하여 논한다. 제어기는 Main CPU module, Field I/O module, Display module, communication module, Mother board module로 구성되었다. 각 모듈은 하드웨어의 특성에 따라 분리되어 설계되었고, mother board를 통하여 module 간 데이터를 교환한다 Main CPU module은 입력된 교통 데이터의 처리, Field I/O module은 외부로의 데이터 입출력, Display module은 제어기와 사용자와의 인터페이스, communication module은 제어기의 debugging을 담당한다. 본 논문에서는 하드웨어를 Module화함으로써 필요한 하드웨어의 장/탈착이 용이하고, 제어기를 범용으로 사용할 수 있는 장점이 있다.

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Implementation of Non-Contact Gesture Recognition System Using Proximity-based Sensors

  • Lee, Kwangjae
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.106-111
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    • 2020
  • In this paper, we propose the non-contact gesture recognition system and algorithm using proximity-based sensors. The system uses four IR receiving photodiode embedded on a single chip and an IR LED for small area. The goal of this paper is to use the proposed algorithm to solve the problem associated with bringing the four IR receivers close to each other and to implement a gesture sensor capable of recognizing eight directional gestures from a distance of 10cm and above. The proposed system was implemented on a FPGA board using Verilog HDL with Android host board. As a result of the implementation, a 2-D swipe gesture of fingers and palms of 3cm and 15cm width was recognized, and a recognition rate of more than 97% was achieved under various conditions. The proposed system is a low-power and non-contact HMI system that recognizes a simple but accurate motion. It can be used as an auxiliary interface to use simple functions such as calls, music, and games for portable devices using batteries.

동적 장면을 지원하는 효율적인 광선 추적 하드웨어에 대한 FPGA상에서의 구현 (Implementation of FPGA for Efficient Ray Tracing Hardware Supporting Dynamic Scenes)

  • 이진영;김정길;박우찬
    • 반도체디스플레이기술학회지
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    • 제21권4호
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    • pp.23-26
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    • 2022
  • In this paper, our ray tracing hardware is implemented on the latest high-capacity FPGA board. The system included ray tracing hardware for rendering and tree building hardware for handling dynamic scenes. The FPGA board used in the implementation is a Xilinx Alveo U250 accelerator card for data centers. This included 12 ray tracing hardware cores and 1 tree-building hardware core. As a result of testing in various scenes in Full HD resolution, the FPS performance of the proposed ray tracing system was measured from 8 to 28. The overall average is about 17.7 FPS.