• Title/Summary/Keyword: Digital architecture design

Search Result 759, Processing Time 0.026 seconds

An Implementation of Product Data Management System for Design of Ship Propulsion System (선박 추진시스템 설계를 위한 PDM 구현)

  • Suh, Sung-Bu
    • Journal of Navigation and Port Research
    • /
    • v.35 no.6
    • /
    • pp.489-494
    • /
    • 2011
  • Present study introduces an implementation of product data management (PDM) that can be applied to the design of ship propulsion system. The PDM system is developed based on both object oriented software development environment and Open Scene Graph (OSG) library while the system architecture is modeled by the unified modeling language (UML). Suggested PDM system also integrates the modeling & simulation components required to estimate the performance of ship propulsion system as the product information is represented based on the 3-dimensional digital mock-up (DMU). Finally, functions of the implemented PDM system that is integrated with the M&S softwares are illustrated in order to suggest a practical guidance for the efficient design of ship propulsion system.

Design of Digital Codec for EPC RFID Protocols Generation 2 Class 1 Codec (EPC RFID 프로토콜 제너레이션 2 클래스 1 태그 디지털 코덱 설계)

  • Lee Yong-Joo;Jo Jung-Hyeon;Kim Hyung-Kyu;Kim Sag-Hoon;Lee Yong-Surk
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.3A
    • /
    • pp.360-367
    • /
    • 2006
  • In this paper, we designed a digital codec of an RFID tag for EPC global generation 2 class 1. There are a large number of studies on RRD standard and anti-collision algorithm but few studies on the design of digital parts of the RFID tag itself. For this reason, we studied and designed the digital codec hardware for EPC global generation 2 class 1 tag. The purpose of this paper is not to improve former studies but to present the hardware architecture, an estimation of hardware size and power consumption of digital part of the RFID tag. Results are synthesized using Synopsys with a 0.35um standard cell library. The hardware size is estimated to be 111640 equivalent inverters and dynamic power is estimated to be 10.4uW. It can be improved through full-custom design, but we designed using a standard cell library because it is faster and more efficient in the verification and the estimation of the design.

Lighting Design through Slice techniques of Domestic Pine (국내산 소나무 슬라이스 기법을 통한 조명디자인 개발연구)

  • Seo, Seok-Min;Kim, Chung-Ho
    • Journal of the Korea Furniture Society
    • /
    • v.22 no.4
    • /
    • pp.270-277
    • /
    • 2011
  • This study aims to find new solutions to the problem of utilization of materials and techniques represented in the development of modern lighting design. LED is an important component in modern lighting design and pine tree is one of the most popular domestic wood in furniture design in Korea. In this study, design is developed into various types of furniture such as a table, a chest, and a lighting, by researching manufacturing process and examining the use of slicing pine tree. The technique of slicing pine tree is a simple linear arrangement that was traditionally used in wooden furniture in Lee dynasty, with an emphasis on repetitive rhythm. The slicing technology is used to expand the usage of domestic pine tree. The beauty of natural wood is expressed with the transmission of light by applying this technique to the lighting design. It also brings new communication in between artificial lighting and natural wood combining this traditional technique and LED lighting in design. Finally, this study suggests particular value through the convergence of analog and digital by using the traditional wooden technique that keeps natural wood prints and new digital technology by using LED lighting. More discussions and research about this subject are expected continuously through this study.

  • PDF

Anterior esthetic restoration using DSD (digital smile design) for a patient with congenital missing tooth of maxillary central incisor (선천적 상악 우측 중절치 결손 환자에서 DSD (digital smile design)를 이용한 전치부 수복 증례)

  • Park, Hye Jeong;Lee, Joon-Seok
    • Journal of Dental Rehabilitation and Applied Science
    • /
    • v.35 no.3
    • /
    • pp.170-179
    • /
    • 2019
  • The prosthodontic treatments in maxillary anterior teeth focus on achieving esthetic appearances. It is possible to improve the esthetic appearance by adjusting the shape, arrangement, and color of the maxillary anterior teeth. For anterior teeth restoration, it is necessary to evaluate the relationship of teeth, lip and gingival architecture with the facial profile of patient. Also, clinician needs to fully understand what the patient wants to. DSD (digital smile design) concept can be applied as a tool to improve communication with the clinician, technician and patient. In addition, DSD can help to meet the needs of the patient. In this case, it was impossible to achieve symmetry due to congenital missing of maxillary central incisor. The definitive treatment goal was to get the harmony of maxillary anterior teeth, lip and the patient's face. This case report describes that the patient and clinician got the satisfying esthetic outcome by using DSD.

A Shipyard Simulation System using the Process-centric Simulation Modeling Methodology: Case Study of the Simulation Model for the Shipyard Master Plan Validation (공정 중심 시뮬레이션 모델링 방법론을 이용한 조선소 생산 시뮬레이션 시스템: 중일정계획 검증 시뮬레이션 모델 구축 사례를 중심으로)

  • Jeong, Yong-Kuk;Woo, Jong-Hun;Oh, Dae-Kyun;Shin, Jong-Gye
    • Korean Journal of Computational Design and Engineering
    • /
    • v.21 no.2
    • /
    • pp.204-214
    • /
    • 2016
  • Shipbuilding process takes a long time for producing final products, and needs many different resources. Because of these characteristics, it has been studied about shipyard simulation and virtual manufacturing that is able to implement the virtual manufacturing process. However, among the previous researches, it requires considerable time and effort to construct simulation model since the systematic methodology has not been used for simulation modeling. Also, reusability of constructed simulation model was low. Therefore, this research defines the method to construct shipyard simulation system using the process-centric simulation modeling methodology and shipyard simulation framework. This paper also validates the utility of this methodology through applying to construct simulation model for the shipyard master plan validation.

A Study on Complex Architectural Color Characteristics and Change of Meaning Structure (복합적 의미의 건축 색채특성과 의미체계 변화에 관한 연구)

  • Lee Seon-Min;Lee Young-Soo
    • Korean Institute of Interior Design Journal
    • /
    • v.14 no.6 s.53
    • /
    • pp.212-219
    • /
    • 2005
  • As the development of digital and technological sophistication, architectural speculation hierarchy had been more and further diversified and brought on the changes with system of architectural color meaning. Architectural color had been influences on evocation of effect and meaning by association, had the attributes of communication with human being, in common with precision, non-verbal and non-quantitative creative field. Color could not been defined as one conclusively standard symbol and figured out in inter-relationship with correlation, mental status and interaction. Color in architecture could been promptly defined as the tool of visualization in building or structure through the essential criterion to be measured with shape, space and author's thought. In consequence, color in architecture could been re-defined as the speculation concept for real characteristics creation(color as design factors on architect and color to be expressed by program) in itself, and color supporting system as for transposition of light and space enlargement scheme. Consequently, color in architecture could been turnover from perceived color to anthropological color through the real value creation scheme in itself.

Design and Implementation of virtualized infrastructure manager based on Micro Service Architecture (마이크로 서비스 아키텍쳐 기반 가상 인프라 매니저 설계 및 구현)

  • Na, TaeHeum;Park, PyungKoo;Ryu, HoYong
    • Journal of Digital Contents Society
    • /
    • v.19 no.4
    • /
    • pp.809-814
    • /
    • 2018
  • With the proliferation of cloud computing infrastructures, service providers are able to deploy services in on-demand manner. Recently, microservice architecture has been attracting attention in order to maximize the efficiency of resource expansion in cloud infrastructure. Instead of implementing all of the service functions in a single software, service providers can easily and autonomously implement the necessary services by interconnecting the necessary services through an efficiently designed application programming interface (API). Moreover service developer can freely choice programming languages and define software, and functional structures to meet their functional requirements. In this paper, we propose virtual infrastructure manager service based on microservice architecture and evaluates its performance in scalability perspective.

Design and Implementation of Multi-mode Mobile Device for supporting License Shared Access (면허기반 주파수 공동 사용을 위한 멀티모드 단말기 설계 및 구현)

  • Jin, Yong;Choi, Seungwon
    • Journal of Korea Society of Digital Industry and Information Management
    • /
    • v.12 no.4
    • /
    • pp.81-87
    • /
    • 2016
  • Recently, as the heterogeneous network (HetNet) has been deployed widely to support various kinds of Radio Access Networks(RANs) with a combination of Macro, Pico, and/or Femto cells, research and standardization efforts have been very active regarding the concept of Licensed Shared Access (LSA) for supporting spectrum sharing. In order for a mobile device to efficiently support the spectrum sharing, the mobile device shall be reconfigurable, meaning that its radio application code has to be adaptively changed in accordance with the hopping of desired spectral band. Especially, Working Group 2 (WG2) of Technical Committee (TC) Reconfigurable Radio System (RRS) of European Telecommunications Standards Institute (ETSI) has been a main driving force for developing standard architecture for Multi-mode Mobile Device (MD) that can be applied to the LSA system. In this paper, we introduce the Multi-mode MD architecture for supporting LSA-based spectrum sharing. An implementation of a test-bed of Multi-mode MD is presented in order to verify the feasibility of the standard MD architecture for the purpose of LSA-based spectrum sharing through various experimental tests.

Design of an Efficient Soft-Decision Demapper for Demodulator of DVB-S2 System (DVB-S2 위성 방송 시스템의 수신기를 위한 효율적인 소프트-결정방식 디매퍼 회로 설계)

  • Ryu, Chang-Duk;SunWoo, Myung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.35 no.4A
    • /
    • pp.371-376
    • /
    • 2010
  • This paper presents an efficient demapper architecture based soft-decision using the phase-section for Digital Video Broadcasting via satellite, Second Generation (DVB-S2). To achieve the satisfactory performance under a very low SNR conditions with the efficient hardware resource utilization, we propose a simple soft-decision demapper architecture using comparators to compare the phase of symbols and memories. The proposed architecture can decrease about 81% of the hardware resource, satisfying the BER requirements of DVB-S2. It has been thoroughly verified with an FPGA board and R&S(R)SFU (Rohde&Schwarz SFU-K108) broadcaast test equipment.

Design of New DSP Instructions and Their Hardware Architecture for High-Speed FFT (고속 FFT 연산을 위한 새로운 DSP 명령어 및 하드웨어 구조 설계)

  • Lee, Jae-Sung;Sunwoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.11
    • /
    • pp.62-71
    • /
    • 2002
  • This paper presents new DSP (Digital Signal Processor) instructions and their hardware architecture for high-speed FFT. the instructions perform new operation flows, which are different from the MAC (Multiply and Accumulate) operation on which existing DSP chips heavily depend. The proposed DPU (Data Processing Unit) supporting the instructions shows two times faster than existing DSP chips for FFT. The architecture has been modeled by the Verilog HDL and logic synthesis has been performed using the 0.35 ${\mu}m$ standard cell library. The maximum operating clock frequency is about 144.5 MHz.