• Journal of Power Electronics
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• v.10 no.3
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• pp.277-284
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• 2010

This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.107.1-107
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• 2001

In this paper, a digital signal processing circuit for Position Sensitive Detectors(PSDs) is introduced to substitute the conventional analog signal processing circuit and to compensate disadvantages of the PSD. In general, the analog circuits have the problems such as noise accumulation, sensitivity for environmental changes, and high cost for manufacturing. Moreover, the intrinsic nonlinearity problem of the PSD makes it hard to measure the position accurately because it is difficult to be overcome the problem by using the conventional analog circuits, which can be solved by using the digital signal processing circuit. The circuit is implemented by using a Field Programmable Gate Array (FPGA). The Pulse Amplitude Modulation(PAM) method is used for reducing the environmental noise effect, and a linear interpolation logic is used to compensate the ...

• Journal of Korea Society of Industrial Information Systems
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• v.17 no.3
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• pp.27-34
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• 2012

This paper presents the impact of time dependent dielectric breakdown (TDDB, also called as gate oxide breakdown) failure on nanoscale digital CMOS Circuits. Recently, TDDB for ultra-thin gate oxides has been considered as one of the critical reliability issues which can lead to performance degradation or logic failures in nanoscale CMOS devices. Also, leakage power in the standby mode can be increased significantly. In this paper, TDDB aging effects on large CMOS digital circuits in the 45nm technology are analyzed. Simulation results show that TDDB effect on MOSFET circuits can result in more significant increase of power consumption compared to delay increase.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.10C
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• pp.1019-1024
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• 2007

In this paper, the 10bit 20MHz pipelined analog-to-digital converter that is able to apply to WLAN system was modeled for ADC design. Each blocks in converter such as sample and hold amplifier(SHA), comparator, multiplyng DAC(MDAC), and digital correction logic(DCL) was modeled. The pipelined ADC with these modeled blocks takes 1/50 less time than the one of simulation using HSPICE.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.481-484
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• 2002

In recent, the contactless IC card is widely used in traffic, access control system and so forth. And its use becomes a general tendency more and more because of the development of RF technology and improvement of requirement for user convenience. This paper describes the hardware module to process contactless protocol for implementation contactless IC card. And the hardware module consists of specific digital logic circuits that analyze digital signal from analog circuit and then generate data & status signal for CPU, and that convert the data from CPU into digital signal for analog circuit.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.4 no.2
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• pp.199-204
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• 2004

In this paper, a new dual-rate digital control technique for the Takagi-Sugeno (T-S) fuzzy system is suggested. The proposed method takes account of the stabilizablity of the discrete-time T-S fuzzy system at the fast-rate sampling points. Our main idea is to utilize the lifted control input. The proposed approach is to obtain the dual-rate discrete-time T-S fuzzy system by discretizing the overall dynamics of the T-S fuzzy system with the lifted control, and then to derive the sufficient conditions for the stabilization in the sense of the Lyapunov asymptotic stability for this system. An example is provided for showing the feasibility of the proposed discretization method.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2296-2298
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• 1998

In this paper, an on-chip learning pulse-mode digital neural network with a massively parallel yet compact and flexible network architecture is suggested. Algebraic neural operations are replaced by stochastic processes using pseudo-random sequences and simple logic gates are used as basic computing elements. Using Back-propagation algorithm both feed-forward and learning phases are efficiently implemented with simple logical gates. RNG architecture using LFSR and barrel shifter are adopted to avoid some correlation between pulse trains. Suggested network is designed in digital circuit and its performance is verified by computer simulation.

• Journal of Institute of Control, Robotics and Systems
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• v.4 no.3
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• pp.406-412
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• 1998

This paper describes a contact position detection method of a capacitive touch screen panel. The proposed method is composed of a circuited compensating algorithm generating an output signal having phase difference to an input signal associated with contact position, converts both input and output signals into digital waveform (5V logic), and calculates the phase difference. Finally, position information with the phase difference is obtained by using a low-cost microprocessor, which is convenient to compensate non-linearity error. The proposed method, that computes phase difference directly, has advantages in feasibility and cost because it minimizes the use of analog devices; rather, it utilizes, cost effective digital circuit. Analytical results are also given.

• Journal of IKEEE
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• v.19 no.4
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• pp.479-485
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• 2015

A resistance deviation-to-time interval converter based on dual-slope integration using second generation current conveyors (CCIIs) is designed for connecting resistive bridge sensors with a digital system. It consists of a differential integrator using CCIIs, a voltage comparator, and a digital control logic for controlling four analog switches. Experimental results exhibit that a conversion sensitivity amounts to $15.56{\mu}s/{\Omega}$ over the resistance deviation range of $0-200{\Omega}$ and its linearity error is less than ${\pm}0.02%$. Its temperature stability is less than $220ppm/^{\circ}C$ in the temperature range of $-25-85^{\circ}C$. Power dissipation of the converter is 60.2 mW.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.404-411
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• 2004

With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with CPLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.