• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1997년도 추계학술대회 논문집
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• pp.64-68
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• 1997

In this paper, a controller for the linear motor with high speed and stiffness is implemented using SERCOS interface which is a real time communication protocol between the numerical controller(NC) and the motor driver. The proposed controller is mainly composed of current, speed, and position controller, which are designed using the 32-bit DSP(TMS320C31), a high-integrated logic device (EPM7128), and Intelligent Power Module(IPM) to enhance reliability and compactness of the system. The experimental results show the effective performance of the proposed controller for he linear motor with high speed and stiffness.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제12B권1호
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• pp.31-36
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• 2002

In a switched reluctance motor drive, it is important to synchronize the stator phase excitation with the rotor position; therefore, the position of rotor is an essential information. Although optical encoders or resolvers are used to provide the position information, these sensors are expensive. Moreover, in the high-speed region, switching angles are fluctuated back and forth out of the preset value, which is caused by the sampling period of the microprocessor. In this paper, a low cost analog encoder suitable for practical applications is proposed. And the control algorithm to generate switching signals using a simple digital logic is presented. The validity of the proposed analog encoder with a proper logic controller is verified from the experiments.

• Transactions on Electrical and Electronic Materials
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• 제8권1호
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• pp.21-25
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• 2007

A two-dimensional TCAD MEDICI simulator was used to examine the voltage transfer characteristics, on-off switching properties and latch-up of a CMOS inverter as a function of the n-channel length and doping levels. The channel in a LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of a CMOS inverter. The digital logic levels of the output and input voltages were analyzed from the transfer curves and circuit operation. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2009년도 정보 및 제어 심포지움 논문집
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• pp.313-315
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• 2009

In this thesis, A methodology of system implement for PID controller, PWM logic, HSC logic, Host Communication and external DAC interface are implemented into single FPGA chip is proposed. The implemented system is used to control the speed of DC servo motor. A DATA block transfers set point value(SV) and P, I, D gain parameters to the corresponding Blocks respectively by the Host Communication to Computer. A HSC block generates process value(PV) by a pulse and $90^{\circ}$ shifted pulse from the encoder A PID block makes error(E) signal from the set value and process value and output manufacture value(MV) through the PID controller. In PWM block using the MV from the PID block, drives H-bridge controlling the Motor. Also DAC interface controls the DAC to graph the digital signal such as SV, PV, E, MV in FPGA onto the Oscilloscope.

• 전기전자학회논문지
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• 제1권1호
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• pp.111-119
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• 1997

본 논문에서는 최근의 디지탈논리시스템의 함수구성시에 도입되고 있는 그래프이론에 바탕을 둔 결정도로부터 새로운 형태의 데이터구조 형태인 에지값 결정도를 추출하는 알고리즘의 한가지 방법을 제안하였다. 그리고 이를 기초로 임의의 m치 n변수의 축약된 함수구성을 도출하는 방법에 대해 논의하였다. 제안한 다치논리함수구성방법은 도식적이며 규칙적이고 정규성을 내포하고 있다.

• 제어로봇시스템학회논문지
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• 제5권7호
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• pp.848-854
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• 1999

In this paper, we designed and implemented a precise pulse motor controller chip that generates the pulse needed to control step motor, DC servo and AC servo motors. This chip generates maximum pulse output rate of 5Mpps and has the quasi-S driving capability and speed and moving distance override capability during driving. We designed this chip with VHDL and executed a logic simulation and synthesis using Synopsys tool. The pre-layout simulation and post-layout simulation was executed by Compass tool. This chip was produced with 100 pins, PQFP package by 0.8${\mu}{\textrm}{m}$ gate array process and implemented by completely digital logic. We developed the test hardware board of performance and the CAMC(Computer Aided Motor Controller) Agent softwate to test the performance of the pulse motor controller chip produced. CAMC Agent enables user to set parameters needed to control motor with easy GUI(Graphic User Interface) environment and to display the output response of motor graphically.

• Nuclear Engineering and Technology
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• 제41권1호
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• pp.79-90
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• 2009

Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2000년도 춘계학술대회논문집 - 한국공작기계학회
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• pp.159-164
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• 2000

In SRM drive, The accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor. As the speed increased, the amount of the switching angle deviation from the preset values is increased by the sampling period. Therefore, in this paper the low cost liner encoder for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using the simple digital logic circuit is presented. and it is verified from the experiments that the proposed encoder and logic controller can be a powerful candidate for the practical low cost SRM drive.

• International Journal of Fuzzy Logic and Intelligent Systems
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• 제4권2호
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• pp.161-164
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• 2004

The yo-yo system has been introduced as an interesting plant to demonstrate the effectiveness of intelligent controllers. Having nonlinear and asymmetric characteristics, the yo-yo plant requires a controller quite different from conventional controllers such as PID. In this paper is presented an adaptive method of controlling the yo-yo system. Fuzzy logic controller based on human expertise is referred at first. Then, an adaptive fuzzy controller which has adaptation features against the variation of plant parameters is proposed. Finally, experimental results are presented.