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http://dx.doi.org/10.5516/NET.2009.41.1.079

VERIFICATION OF PLC PROGRAMS WRITTEN IN FBD WITH VIS  

Yoo, Jun-Beom (Konkuk University, Division of Computer Science and Engineering)
Cha, Sung-Deok (Korea University, Department of Computer Science and Engineering)
Jee, Eun-Kyung (KAIST, Department of Electrical Engineering and Computer Science)
Publication Information
Nuclear Engineering and Technology / v.41, no.1, 2009 , pp. 79-90 More about this Journal
Abstract
Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.
Keywords
Verification; Equivalence Checking; VIS; Verilog; Function Block Diagram; Programmable Logic Controller; IEC-61131;
Citations & Related Records

Times Cited By Web Of Science : 1  (Related Records In Web of Science)
Times Cited By SCOPUS : 4
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