• Title/Summary/Keyword: Digital Audio Amplifier

Search Result 33, Processing Time 0.048 seconds

Improved 20Mb/s CMOS Optical Receiver for Digital Audio Interfaces (디지털 오디오 인터페이스용 개선된 20Mb/s CMOS 광수신기)

  • Yoo, Jae-Tack;Kim, Gil-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.3 s.357
    • /
    • pp.6-11
    • /
    • 2007
  • This paper proposes CMOS optical receivers to reduce effective area and pulse width distortion (PWD) in high definition digital audio interfaces. To mitigate effective area and PWD, proposed receivers include a frans-impedance amplifier (TIA) with dual output and a level shifter with threshold convergence, respectively. Proposed circuits are fabricated using $0.25{\mu}m$ CMOS process and measured result demonstrated the effective area of $270\times120{\mu}m^2$ and PWD of ${\pm}3%$ for the receiver with a dual output TIA, and the effective area of $410\times140{\mu}m^2$ and PWD of ${\pm}2%$ for the receiver with a threshold convergence level shifter.

A Hybrid Audio ${\Delta}{\Sigma}$ Modulator with dB-Linear Gain Control Function

  • Kim, Yi-Gyeong;Cho, Min-Hyung;Kim, Bong-Chan;Kwon, Jong-Kee
    • ETRI Journal
    • /
    • v.33 no.6
    • /
    • pp.897-903
    • /
    • 2011
  • A hybrid ${\Delta}{\Sigma}$ modulator for audio applications is presented in this paper. The pulse generator for digital-to-analog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 ${\mu}m$ CMOS technology (I/O devices) and occupies an active area of 0.37 $mm^2$. The ${\Delta}{\Sigma}$ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 nsRMS external clock jitter.

Novel Current Stress Reduction Technique for Boost Integrated Half-Bridge DC/DC Converter with Voltage Doubler Type Rectifier (전압 체배 정류단을 갖는 부스트 입력형 하프브리지 DC/DC 컨버터를 위한 새로운 전류 스트레스 저감 기법)

  • Park Hong-Sun;Kim Chong-Eun;Moon Gun-Woo
    • Proceedings of the KIPE Conference
    • /
    • 2006.06a
    • /
    • pp.39-42
    • /
    • 2006
  • a current stress reduction technique for a boost integrated half-bridge (BIHB) DC/DC converter with voltage doubler type rectifier is proposed for digital car audio amplifier application. In the proposed circuit, two external capacitors are added parallel to the rectifier diodes in the secondary side of the transformer to shape the primary and the secondary current like rectangular waveforms in every switching instance. The experimental results of a 200W industrial sample show that the peak primary current decreases about by 10A. Thus, the proposed technique shows improved high efficiency.

  • PDF

Design and Construction of a FFT Analyzer Using a Microcomputer (마이크로컴퓨터를 이용한 FFT 분석기의 설계 및 제작)

  • Lee, Hyeun Tae;Kim, Jung Gyu;Lee, Sang Bae
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.23 no.6
    • /
    • pp.944-949
    • /
    • 1986
  • By improving the ability of arithmatic processing with an arithmatic processor in a microcomputer and realizing the data input system for real time analysis, an FFT analyzer that is usable within the range of audio frequency is designed and constructed. The input signal passes through a gain programmable pre-amplifier and anti-aliasing lowpass filter into an analogditital converter to be converted into digital form. The converted input data is processed by an Apple II microcomputer. The results of the processing are displayed using a microcomputer display unit and can be copied on a printer or stored in a floppy disk.

  • PDF

A Single-Bit 3rd-Order Feedforward Delta Sigma Modulator Using Class-C Inverters for Low Power Audio Applications (저전력 오디오 응용을 위한 Class-C 인버터 사용 단일 비트 3차 피드포워드 델타 시그마 모듈레이터)

  • Hwang, Jun-Sub;Cheon, Jimin
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.15 no.5
    • /
    • pp.335-342
    • /
    • 2022
  • In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

A Review of Assistive Listening Device and Digital Wireless Technology for Hearing Instruments

  • Kim, Jin Sook;Kim, Chun Hyeok
    • Korean Journal of Audiology
    • /
    • v.18 no.3
    • /
    • pp.105-111
    • /
    • 2014
  • Assistive listening devices (ALDs) refer to various types of amplification equipment designed to improve the communication of individuals with hard of hearing to enhance the accessibility to speech signal when individual hearing instruments are not sufficient. There are many types of ALDs to overcome a triangle of speech to noise ratio (SNR) problems, noise, distance, and reverberation. ALDs vary in their internal electronic mechanisms ranging from simple hard-wire microphone-amplifier units to more sophisticated broadcasting systems. They usually use microphones to capture an audio source and broadcast it wirelessly over a frequency modulation (FM), infra-red, induction loop, or other transmission techniques. The seven types of ALDs are introduced including hardwire devices, FM sound system, infra-red sound system, induction loop system, telephone listening devices, television, and alert/alarm system. Further development of digital wireless technology in hearing instruments will make possible direct communication with ALDs without any accessories in the near future. There are two technology solutions for digital wireless hearing instruments improving SNR and convenience. One is near-field magnetic induction combined with Bluetooth radio frequency (RF) transmission or proprietary RF transmission and the other is proprietary RF transmission alone. Recently launched digital wireless hearing aid applying this new technology can communicate from the hearing instrument to personal computer, phones, Wi-Fi, alert systems, and ALDs via iPhone, iPad, and iPod. However, it comes with its own iOS application offering a range of features but there is no option for Android users as of this moment.

Design of the New Third-Order Cascaded Sigma-Delta Modulator for Switched-Capacitor Application (스위치형 커패시터를 적용한 새로운 형태의 3차 직렬 접속형 시그마-델타 변조기의 설계)

  • Ryu Jee-Youl;Noh Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2006.05a
    • /
    • pp.906-909
    • /
    • 2006
  • This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented in a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage.

  • PDF

Design of QPSK Ultrasonic Transceiver For Underwater Communication (수중 통신을 위한 QPSK 초음파 송수신기의 설계)

  • Cho Nai-Hyun;Kim Duk-Yung;Kim Yong-Deuk;Chung Yun-Mo
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.43 no.3 s.309
    • /
    • pp.51-59
    • /
    • 2006
  • In this paper, we propose an excellent ultrasonic transceiver system based on a QPSK modulation technique for underwater communication. The transmitter sends a still image at the level of 187dB re $1{\mu}Pa/V@1m$ through a power amplifier by driving an ultrasonic sensor. The receiver performs digital conversion at the 100kHz sampling frequency, demodulation and decoding process for the image sent from the transmitter through the underwater communication. We have shown that the processed image at the receiver is almost the same as the orignal one. The maximum detection distance of the system proposed in this paper is approximately 1.17km. To cope with the difficulties of transmission loss, this paper proposes, implements and analyzes important parameters of sensors and circuits used in the system. Most of the underwater communication has focused on the transmission of audio signal, but this paper suggests an efficient underwater communication system for still image transmission.

A Novel Third-Order Cascaded Sigma-Delta Modulator using Switched-Capacitor (스위치형 커패시터를 이용한 새로운 형태의 3차 직렬 접속형 시그마-델타 변조기)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.1
    • /
    • pp.197-204
    • /
    • 2010
  • This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

Development and Basic Experiment of Active Noise Control System for Reduction of Road Noise (도로 소음 저감을 위한 능동소음제어 시스템의 개발 및 기초실험)

  • Moon, Hak Ryong;Kang, Won Pyoung;Lim, You Jin
    • International Journal of Highway Engineering
    • /
    • v.15 no.6
    • /
    • pp.41-47
    • /
    • 2013
  • PURPOSES : The purpose of this study is about noise which is generated from roads and is consist of irregular frequency variation from low frequency to various band. The existing methods of noise reduction are sound barrier that uses insulation material and absorbing material or have applied passive technology of noise reduction by devices. The total frequency band is needed to apply active noise control. METHODS : In this study applies to the field of road traffic environment, signal processing controller and various analog signal input/output, the amplifier module is based on parallel-core embedded processor designed. DSP performs the control algorithm of the road traffic noise. Noise sources in the open space performance of evaluation were applied. In this study, controller of active signal processor was designed based on the module of audio input/output and main controller of embedded process. The controller of active signal processor operates noise reduction algorithm and performance tests of noise reduction in inside and outside environment were executed. RESULTS : The signal processing controller with OMAP-L137 parallel-core processors as the center, DSP processors in the active control operations dealt with quickly. To maximize the operation speed of an object and ARM processor is external function keys and display for functions and evaluating the performance management system was designed for the purpose of the interface. Therefore the reduction of road traffic noise has established an electronic controller-based noise reduction. CONCLUSIONS : It is shown that noise reduction is effective in the case of pour tonal sound and complex tonal sound below 500Hz by appling to Fx-LMS.