• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.1
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• pp.40-45
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• 1991

It is well known that the conventional differential source-coupled pair uses gates as its input terminals. This input pair provids a high open-loop gain, a large CMRR, and a good PSRR. For these reasons, the input pair has been used widely as an input stages of the differential amplifiers, but a narrow linear input range of this structurelimits its application in the area of some analog circuit design. A novel CMOS source-coupled backgate pair is proposed in this paper. The bulk of MOSFET is exploited and input devices are biased to operate in ohmic region. With this topology, the backgate pair of the wide linear input range and variable transconductance can be obtained. This backgate input differential stage is realized with the size of W/L=50/25 MOSFETs. The results show the nonlinear error is less than $\gamma$1% over 10V full-scale range for the bias current of 200$\mu$A with 10V single power-supply.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.11
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• pp.141-150
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• 2000

Continuously variable transmission(CVT) combined differential gear unit has many advantages, which are the decrease of CVT size, the increase of overall efficiency, the extension of speed ratio range, and the generation of geared neutral. It is known that such CVT can be classified into the input coupled type and the output coupled type according to the coupling location of continuously variable unit(CVU). In this paper, six different configurations of input coupled type CVT combined V-belt CVU and 2K-H I type differential gear unit are proposed. Some useful theoretical formula related to speed ratio, power flow and efficiency are derived and analyzed. The propriety of derived formula and theoretical analysis are proven by various experiments.

• Journal of Institute of Control, Robotics and Systems
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• v.19 no.1
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• pp.56-64
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• 2013

We propose an efficient minimum-time cornering motion planning algorithms for differential-driven wheeled mobile robots with motor control input constraint, under piecewise constant control input sections. First, we established mobile robot's kinematics and dynamics including motors, divided the cornering trajectory for collision-free into one translational section, followed by one rotational section with angular acceleration, and finally the other rotational section with angular deceleration. We constructed an efficient motion planning algorithm satisfying the bang-bang principle. Various simulations and experiments reveal the performance of the proposed algorithm.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.7
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• pp.23-29
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• 1997

The performance degradation of CMOS differential amplifiers due to hot carrier effect has been measured and analyzed. Two-state CMOS amplifiers whose input transistors are PMOSFETs were designed and fabriacted using the ISRC CMOS 1.5.mu.m process. It was observed after the amplifier was hot-carrier stressed that the small-signal voltage gain and the input offset voltage increased and the phase margin decreased. The performance variation results from the increase of the transconductances and gate capacitances of the PMOSFETs used as input transistors in the differential input stage and the output stage and also resulted from the decrease of their output conductances. After long-term stress, the amplifier became unstable. The reason might be that its phase margin was reduced due to hot carrier effect.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.1
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• pp.7-18
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• 2002

Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on $IIP_2$. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using $0.35{\;}\mu\textrm{m}$ CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better $IIP_2$, and 4.5 dB better $IIP_3$performances.

• International Journal of Precision Engineering and Manufacturing
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• v.2 no.1
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• pp.43-55
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• 2001

A continuously variable transmission(CVT) mechanism composed of one differential gear unit and one continuously variable unit(CVU) can be classified according to the coupling of CVU and the direction of power flows. The mechanism has many advantages which are the decrease of CVT size, the increase of overall efficiency, the extension of speed ratio range and generation of geared neutral. The CVT mechanism considered here is the input coupled type which combines the functions of a 2K-H I type differential gear unit and a V-belt type CVU. One shaft of the CVU is connected directly to the input shaft and another shaft of it is linked to the differential gear unit. It is shown that some fundamental relations(speed ratios, power flows and efficiencies) for twelve mechanisms previously described are valid by various experimental studies, six of them produce a power circulation and the others produce a power split. Some useful comparisons between theoretical analysis and experimental results are presented. General properties also are discussed, which connect following power flow modes : (a) power circulation mode; (b) power split mode.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.891-896
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• 2011

This paper describes the differential voltage-to-frequency converter which is realized current conveyor circuits. The output frequency of the differential voltage-to-frequency converter is proportional to the difference of two input voltages. The designed circuit is simulated by HSPICE. The range of input voltage difference is from several volts to several milli-volts. From the simulation results the error is less than from -1.9% to +1.8% compared to the calculated values.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.3
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• pp.1131-1143
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• 2016

Differential detection schemes do not require any channel estimation, which can be employed under user mobility with low computational complexity. In this work, a soft-input soft-output (SISO) differential detection algorithm is proposed for amplify-and-forward (AF) over time-varying relaying channels based cooperative communications system. Furthermore, maximum-likelihood (ML) detector for M-ary differential Phase-shift keying (DPSK) is derived to calculate a posteriori probabilities (APP) of information bits. In addition, when the SISO is exploited in conjunction with channel decoding, iterative detection and decoding approach by exchanging extrinsic information with outer code is obtained. Finally, simulation results show that the proposed non-coherent approach improves detection performance significantly. In particular, the system can obtain greater performance gain under fast-fading channels.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.57-62
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• 1998

In this paper, tunable transconductor shows good linearity over a wide input voltage range are proposed. The proposed transconductor employ operating in the nonsaturation(ie., linear) region to improve circuit simplicity and tunability and 6.8V$\_$p-p/ wide input range. Also the circuit employ source-coupled differential pair to provide true differential input and can achieve both positive and negative transconductance values. The proposed circuits are implemented using a 1.2 $\mu\textrm{m}$ single poly double metal n-well CMOS technology. The THD characteristic of proposed circuit is less than 1% for a differential input voltage of up to 6V$\^$p-p/ when supply bias condition is V$\_$DD/=-V$\_$ss/=5V, I$\_$B/=20, 40${\mu}$A, and frequency of input signal is 1KHz.

• ETRI Journal
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• v.28 no.4
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• pp.495-501
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• 2006

This paper presents a new CMOS fully-differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully-differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit operating at a supply voltage of ${\pm}1.5\;V$, it has a total standby current of $380\;{\mu}A$. The applications of the FDCCII to realize a variable gain amplifier, fully-differential integrator, and fully-differential second-order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS $0.35\;{\mu}m$ technology.