• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.10
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• pp.1188-1194
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• 2019

Among the many ways to measure the flow of fluid the hot air wind speed sensor is a device for measuring the speed or temperature by heat transfer of a fluid. However, the hot wire wind speed sensor is sensitive to external environmental factors, and has a disadvantage of inaccuracy due to ambient temperature, humidity, and signal noise. In order to compensate for this disadvantage, advanced technology has been introduced by adding temperature compensation circuits, but it is expensive. In order to solve this problem, this paper studies the wind speed sensor that does not need temperature compensation. Heated wind speed sensors are very vulnerable to the ambient temperature, which is generated by electronic circuits, even among external environmental factors. in order to improve this, the auxiliary heating element is additionally installed in the heating element to control a constant temperature difference between the auxiliary heating element and the heating element.

• The Journal of the Convergence on Culture Technology
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• v.8 no.6
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• pp.749-755
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• 2022

Electricity is essential energy in modern society, such as being used in various industries. However, the rate of fires occurring on electric wiring to deal with it is very high. In this work, we implemented a system to predict the temperature change of an electric circuit through analysis using various regression models. To do so, we collected the temperature data of 27 types of magnetic switches which control electric circuits as well as trained the regression models by using the collected temperature data. In our experiments, we confirmed that the regression models can be trained at a sufficiently usable level since the difference between the actual temperature and predicted temperature is about 4℃. The results of our work will be useful to predict the temperature of electric circuits and preventing fires on them.

• Journal of Korea Society of Industrial Information Systems
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• v.16 no.5
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• pp.1-8
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• 2011

This paper proposes a new input pattern generator for minimal leakage power in the nanometer CMOS technology considering all the leakage current components (sub-threshold leakage, gate tunneling leakage, band-to-band tunneling leakage). Using the accurate macro-model, a heuristic algorithm is developed to generate a input pattern for the minimum leakage. The algorithm applies to ISCAS85 benchmark circuits, and the results are compared with the results of Hspice. The simulation result shows that our method's accuracy is within a 5% difference of the Hspice simulation results. In addition, the simulation time of our method is far faster than that of the Hspice simulation.

• Transactions on Electrical and Electronic Materials
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• v.14 no.3
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• pp.156-159
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• 2013

The electrical properties of ZnO nanowire field effect transistors (FETs) have been investigated depending on various diameters of nanowires. The ZnO nanowires were synthesized with an Au catalyst on c-plane $Al_2O_3$ substrates using hot-walled pulsed laser deposition (HW-PLD). The nanowire FETs are fabricated by conventional photo-lithography. The diameter of ZnO nanowires is simply controlled by changing the thickness of the Au catalyst metal, which is confirmed by FE-SEM. It has been clearly observed that the ZnO nanowires showed different diameters simply depending on the thickness of the Au catalyst. As the diameter of ZnO nanowires increased, the threshold voltage of ZnO nanowires shifted to the negative direction systematically. The results are attributed to the difference of conductive layer in the nanowires with different diameters of nanowires, which is simply controlled by changing the catalyst thickness. The results show the possibility for the simple method of the fabrication of nanowire logic circuits using enhanced and depleted mode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.863-869
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• 2005

We investigated quench characteristics of superconducting elements connected in series and parallel each other. The serial and parallel connections of superconducting elements causes a difficulty in simultaneous quench due to slight difference between their critical current densities. In other to induce simultaneous quench, we fabricated four type circuits; serially connected circuit before parallel connection, the circuit connected in parallel before serial connection, serially connected circuit before parallel connection with reactors, the circuit connected in Parallel before serial connection with reactors. We confirmed that the simultaneous quenches occurred in serial and parallel connections of superconducting elements using reactors. In addition, the power burden of superconducting elements was smaller than those of serial and parallel connections of superconducting elements without reactors.

• Journal of the Optical Society of Korea
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• v.15 no.3
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• pp.283-288
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• 2011

In this study, a wide-band photonic crystal Y-splitter for TE modes is proposed. A triangular lattice of air holes etched in a GaAs slab is used as the platform. In order to numerically analyze the structures, plane wave expansion (PWE) and finite difference time domain (FDTD) methods are used. In comparison with the structures reported in the literature, the proposed topology has a less complexity while it provides more than 100nm bandwidth. The simplicity of the design, its high transmission ratio and its wide bandwidth makes it a suitable choice for the implementation of photonic crystal integrated circuits.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.14 no.2
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• pp.58-62
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• 2004

The shape evolution of the interface void of copper metallization for intergrated circuits under electromigration stress is modeled. A 2-dimensional finite-difference numerical method is employed for computing time evolution of the void shape driven by surface diffusion, and the electrostatic problem is solved by boundary element method. When the diffusion coefficient is isotropic, the numerical results agree well with the known case of wedge-shape void evolution. The numerical results for the anisotropic diffusion coefficient show that the initially circular void evolves to become a fatal slitlike shape when the electron wind force is large, while the shape becomes non-fatal and circular as the electron wind force decreases. The results indicate that the open circuit failure caused by slit-like void shape is far less probable to be observed for copper metallization under a normal electromigration stress condition.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.10
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• pp.844-850
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• 2002

Linearly graded profiles on the field area oxide are frequently used in power integrated circuits to reduce the surface electric field when power devices are operated in forward or reverse blocking modes. It is shown here that tapered windows can be made using the difference of etch rates between the bottom and the top layer of TEOS film. Annealed TEOS films are etched at a lower rate than the TEOS film without annealing Process. The fast etching layer results in window walls having slopes in the range of 25$^{\circ}$∼ 80$^{\circ}$ with respect to the wafer surface. Taper etching technique by annealing the TEOS film applies to high voltage LDMOS, which is compatible with CMOS process, due to the minimum changes in both of design rules and thermal budget.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.4
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• pp.84-92
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• 1998

A program was developed to analyze the electrical characteristics and harmonic distrotion in a two-dimensional silicon BJT. The finite difference equations of the small signal and its second and thired harmonics for basic semiconductor equations are formulated treating the nonlinearity and time dependence with Volterra series and Taylor series. The soluations for three sets of simultaneous equations were obtained sequantially by a decoupled iteration method and each set was solved by a modified Stone's algorithm. Distortion magins and ac parameters such as input impedance and current gains are calculated with frequency and load resistance as parameters. The distortion margin vs. load resistancecurves show cancellation minima when the pahse of output voltage shifts. It is shown that the distortionof small signal characteristics can be reduced by reducing the base width, increasing the emitter stripe length and reducing the collector epitaxial layer doping concentration in the silicon BJT structure. The simulation program called TRADAP can be used for the design and optimization of transistors and circuits as well as for the calculation of small signal and distortion solutions.

• 제어로봇시스템학회:학술대회논문집
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• 1995.10a
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• pp.236-239
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• 1995

It is useful to simulate the human visual function for the purpose of image-processing. In this study, the hardware of the spatial filter with the sensitivity of lateral inhibition is realized by the combination of optical parts with electronic circuits. The diffused film with the characteristics of Gaussian type is prepared as a spatial filter. An object's image is convoluted with the spatial filter. From the difference of the convoluted images, the zero-cross position is detected at video rate. The edge of object is extracted in real-time by the use of this equipment. The resolution of edge changes with the value of the standard deviation of diffused film. In addition, it is possible to extract a directional edge selectively when the spatial filter with directional selectivity is used instead of Gaussian type of spatial filter.