• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.4
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• pp.532-542
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• 1996

The electrical and optical properties of the annealed $LiNbO_{3}$ single crystal with congruently melting composition and MgO or ZnO doped $LiNbO_{3}$ single crystal grown by the FZ method. The electrical and optical properties such as electrical conductivity, dielectric constant (Curie temperature), electro-mechanical coupling factor, optical transmittance and refractive indices of the grown crystals were measured and the nonlinear refractive indices of the grown crystals were calculated theoretically. The doping effects of MgO and ZnO were investigated by comparing the electrical and optical properties of the undoped $LiNbO_{3}$ single crystal and those of the $LiNbO_{3}$ single crystals doped with MgO or ZnO.

• Korean Journal of Materials Research
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• v.18 no.3
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• pp.148-152
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• 2008

A new cost-effective atomic layer deposition (ALD) technique, known as Proximity-Scan ALD (PS-ALD) was developed and its benefits were demonstrated by depositing $Al_2O_3$ and $HfO_2$ thin films using TMA and TEMAHf, respectively, as precursors. The system is consisted of two separate injectors for precursors and reactants that are placed near a heated substrate at a proximity of less than 1 cm. The bell-shaped injector chamber separated but close to the substrate forms a local chamber, maintaining higher pressure compared to the rest of chamber. Therefore, a system configuration with a rotating substrate gives the typical sequential deposition process of ALD under a continuous source flow without the need for gas switching. As the pressure required for the deposition is achieved in a small local volume, the need for an expensive metal organic (MO) source is reduced by a factor of approximately 100 concerning the volume ratio of local to total chambers. Under an optimized deposition condition, the deposition rates of $Al_2O_3$ and $HfO_2$ were $1.3\;{\AA}/cycle$ and $0.75\;{\AA}/cycle$, respectively, with dielectric constants of 9.4 and 23. A relatively short cycle time ($5{\sim}10\;sec$) due to the lack of the time-consuming "purging and pumping" process and the capability of multi-wafer processing of the proposed technology offer a very high through-put in addition to a lower cost.

• Korean Journal of Materials Research
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• v.5 no.6
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• pp.633-638
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• 1995

Two types of $Ta_2O_{5}$, films, prepared by thermal oxidation and PECVD, on P-type(100) Si wafers were studied to examine the relationship between electrical properties and stresses of the films. For the thermally oxidized films, Ta films were depositied on the Si wafers by dc magnetron sputtering followed by thermal oxidation as functions of oxidation temperature and time. The PECVD films were deposited on the Si wafers as a fuction of RF power density. The relationship between the electrical properties and film stresses were studied. In the case of thermally oxidized $Ta_2O_{5}$ film, the electrical properties and film stress were not found to be dependent on each other, while PECVD $Ta_2O_{5}$ films showed that the electrical properties were depended on the film stress.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.1
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• pp.33-40
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• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.

• Journal of the Korean Ceramic Society
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• v.51 no.6
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• pp.623-628
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• 2014

Orthorhombic $Ba(Ti_{0.94}Zr_{0.06})O_3$ single crystals are fabricated using the cost-effective solid-state single crystal growth (SSCG) method; their dielectric and piezoelectric properties are also characterized. Measurements show that (001) $Ba(Ti_{0.94}Zr_{0.06})O_3$ single crystals have an electromechanical coupling factor ($k_{33}$) higher than 0.83, piezoelectric charge constant ($d_{33}$) of about 400 [pC/N], and piezoelectric voltage constant ($g_{33}$) higher than 50 [${\times}10^{-3}Vm/N$]. The transition temperature ($T_{OT}$) of the (001) $Ba(Ti_{0.94}Zr_{0.06})O_3$ single crystals between orthorhombic and tetragonal phases is also observed to be about $61^{\circ}C$. Because their electromechanical coupling factor ($k_{33}$) and piezoelectric voltage constant ($g_{33}$) are higher than those of soft PZT ceramics, it is expected that (001) $Ba(Ti_{0.94}Zr_{0.06})O_3$ single crystals can be used as "lead-free" piezoelectric materials in many piezoelectric applications.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.865-868
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• 2005

We fabricated the $Pb_{0.72}La_{0.28}TiO_3 (PLT(28))$ thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the Pt/Ti/SiO$_2$/Si substrate and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}$A/cm$^2$, respectively

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.310-310
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• 2007

Mg-Si-O계 세라믹스에 glass frit 조성을 첨가하여 저온에서의 소결 특성 및 마이크로파 유전 특성을 연구하였다. 기존의 Mg-Si-O계 세라믹스는 우수한 유전특성을 가지고 있으나 높은 소결온도로 인하여 LTCC용 기판 소재로 적용이 어려웠다. 본 연구에서는 MgO, $SiO_2$를 이용하여 $Mg_2SiO_4$을 합성한 후, $B_2O_3-ZnO-Na_2O-SiO_2-Al_2O_3$계 glass 조성을 20~40wt%로 첨가하여 소결온도를 감소시켜 LTCC 기판 소재로서의 적용성을 고찰하였다. glass frit 함량이 증가함에 따라 밀도($g/cm^3$) 및 유전율(${\varepsilon}_r$)은 증가하였고 품질계수($Qxf_0$)값은 감소하였다. glass frit 함량이 40wt%일때 $900^{\circ}C$에서 1시간 소결한 소결체의 유전톡성은 유전율 (${\varepsilon}_4$) = 6.5. 품질계수 ($Qxf_0$) = 4,000(GHz), 온도계수 $(\tau_t)\;=\;{\pm}\;10ppm/^{\circ}C$로 우수한 특성을 확인하였다.

• Transactions on Electrical and Electronic Materials
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• v.18 no.4
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• pp.199-202
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• 2017

Silicon carbide (SiC) is being spotlighted as a next-generation power semiconductor material owing to the characteristic limitations of the existing silicon materials. SiC has a wider band gap, higher breakdown voltage, higher thermal conductivity, and higher saturation electron mobility than those of Si. When using this material to implement Schottky barrier diode (SBD) devices, SBD-state operation loss and switching loss can be greatly reduced as compared to that of traditional Si. However, actual SiC SBDs exhibit a lower dielectric breakdown voltage than the theoretical breakdown voltage that causes the electric field concentration, a phenomenon that occurs on the edge of the contact surface as in conventional power semiconductor devices. Therefore in order to obtain a high breakdown voltage, it is necessary to distribute the electric field concentration using the edge termination structure. In this paper, we designed an edge termination structure using a field plate structure through oxide etch angle control, and optimized the structure to obtain a high breakdown voltage. We designed the edge termination structure for a 650 V breakdown voltage using Sentaurus Workbench provided by IDEC. We conducted field plate experiments. under the following conditions: $15^{\circ}$, $30^{\circ}$, $45^{\circ}$, $60^{\circ}$, and $75^{\circ}$. The experimental results indicated that the oxide etch angle was $45^{\circ}$ when the breakdown voltage characteristics of the SiC SBD were optimized and a breakdown voltage of 681 V was obtained.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.49-49
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• 2007

Glass infiltration 방법을 이용하여 '$A_2O_3$/Glass/$Al_2O_3$' 구조의 무수축 LTCC 기판을 제조하였다. Glass infiltration 법에 의한 무수축 기판 제조에 있어 가장 중요한 요소로는 Glass의 점성은 낮고, alumina에 대한 Glass의 젖음성 (wettability)이 좋으며. 낮은 반응성이 요구되기 때문에 Glass의 조성 선정이 무엇보다 중요하다. 본 연구에서는 Na, Pb, Mg 계열의 각기 다른 glass들의 alumina에 대한 젖음성을 평가하여 젖음성 및 치밀성이 우수한 Pb 계열의 Glass를 이용하여 LTCC 기판으로 적용 가능한 온도인 $700{\sim}900^{\circ}C$에서 '$A_2O_3$/Glass/$Al_2O_3$'구조의 glass infiltration 특성을 고찰하였다. 소성 후 수축율은 x-y축 0.2%, Z축 40%, 밑도 $3.8g/cm^3$, 유전율 6.8, 품질계수 552로 무수축 기판으로서의 적용 가능성을 확인하였다.

• Electronic Materials Letters
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• v.14 no.6
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• pp.669-677
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• 2018

In this work, the high ${\kappa}$ $Zr_xAl_{1-x}O_y$ films with a different Zr concentration have been deposited by atomic layer deposition, and the effect of Zr concentrations on the structure, chemical composition, surface morphology and dielectric properties of $Zr_xAl_{1-x}O_y$ films is analyzed by Atomic force microscopy, X-ray diffraction, X-ray photoelectron spectroscopy and capacitance-frequency measurement. The effect of Zr concentrations of $Zr_xAl_{1-x}O_y$ gate insulator on the electrical property and stability under negative bias illumination stress (NBIS) or temperature stress (TS) of ZnSnO (ZTO) TFTs is firstly investigated. Under NBIS and TS, the much better stability of ZTO TFTs with $Zr_xAl_{1-x}O_y$ film as a gate insulator is due to the suppression of oxygen vacancy in ZTO channel layer and the decreased trap states originating from the Zr atom permeation at the $ZTO/Zr_xAl_{1-x}O_y$ interface. It provides a new strategy to fabricate the low consumption and high stability ZTO TFTs for application.