• 제목/요약/키워드: Dielectric hysteresis loop

검색결과 41건 처리시간 0.032초

Device characterization and Fabrication Issues for Ferroelectric Gate Field Effect Transistor Device

  • Yu, Byoung-Gon;You, In-Kyu;Lee, Won-Jae;Ryu, Sang-Ouk;Kim, Kwi-Dong;Yoon, Sung-Min;Cho, Seong-Mok;Lee, Nam-Yeal;Shin, Woong-Chul
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권3호
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    • pp.213-225
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    • 2002
  • Metal-Ferroelectric- Insulator- Silicon (MFIS) structured field effect transistor (FET) device was fabricated and characterized. Important issues to realize ferroelectric gate field effect transistor device were summarized in three sections. The choice of interlayer dielectric was made in the consideration of device functionality and chemical reaction between ferroelectric materials and silicon surface during fabrication process. Also, various ferroelectric thin film materials were taken into account to meet desired memory window and process compatibility. Finally, MFIS structured FET device was fabricated and important characteristics were discussed. For feasible integration of current device as random access memory array cell address schemes were also suggested.

$(Pb_{1-x}La_x)(Zr_{0.5}Ti_{0.5})O_3$ 박막의 La 치환량에 따른 특성 (Characteristics of $(Pb_{1-x}La_x)(Zr_{0.5}Ti_{0.5})O_3$ thin films as a function of La content)

  • 정낙원;이성환;이동영;김동훈
    • Journal of Advanced Marine Engineering and Technology
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    • 제30권8호
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    • pp.894-900
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    • 2006
  • The electrical characteristics associated with crystal structure changes as a function of La content for $(Pb_{1-x}La_x)(Zr_{0.5}Ti_{0.5})O_3$ thin films were investigated for applications in memory capacitors. Tetragonality of PLZT films decreased with increasing La content. Thin films with La $\geq$ 20 mol% were found to be cubic. Films with La $\geq$ 12 mol% exhibited broader dielectric peaks compared to those of bulk ceramics and behaved as relaxer ferroelectrics. Tetragonal PLZT film with 12 mol% La had a dielectric constant maximum of 1330 at room temperature and a charge storage density of ${\sim}18{\mu}C/cm^2$ at 5 V. Decrease in coercive field and remnant polarization with increase in La content were resulting from less dipolar response caused by the decreased crystal anisotropy. The leakage current densities $<10^{-8}A/cm^2$ up to 5 V bias voltage were observed for the films with La $\geq$ 14 mol%.

MOD 법으로 제조한 강유전성 SBT 박막에서 하부전극이 유전 및 전기적 특성에 미치는 영향 (Effects of Bottom Electrode to Dielectric and Electrical Properties of MOD Derived Ferroelectric SBT Thin Films)

  • 김태훈;송석표;김병호
    • 한국전기전자재료학회논문지
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    • 제13권8호
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    • pp.694-699
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    • 2000
  • S $r_{0.9}$/B $i_{2.1}$/T $a_{2}$/ $O_{9}$ solutions was synthesized by MOD (metalorganic decomposition) method. SBT thin films with 2000$\AA$ thickness were prepared on Ir $O_2$/ $SiO_2$/Si and Pt/Ti/ $SiO_2$/Si substrates using the spin coating process and then investigated the dielectric and electrical properties of them. In the case of using Ir $O_2$bottom electrode the hysteresis loop was saturated at lower temperature than Pt/Ti electrode but the breakdown phenomenon was occurred at low voltage because of the rough surface morphology and porous microstructure of SBT thin films. As the results of the fatigue and imprint characteristics related to the lifetime and reliability of devices after 10$^{10}$ cycles the fatigue rates were about 10% at the Ir $O_2$and Pt/Ti bottom electrodes. Both SBT thin films with Ir $O_2$ and with Pt/Ti bottom electrodes show a slight tendency to imprint after 10$^{9}$ cycles but do not lead to a failure.e.e.

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고집적 DRAM소자용 14/50/50 PLZT 박막의 특성에 관한 연구 (A Study on Characteristic of the 14/50/50 PLZT Thin Film for DRAM Capacitor)

  • 박용범;장낙원;백동수;마석범;최형욱;박창엽
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.118-121
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    • 1999
  • PLZT thin films were fabricated with different energy density by pulsed laser deposition. PLZT films deposited on Pt/Ti/SiO$_2$/Sr substrate. This PLZT thin films of 5000$\AA$ thickness were crystallized at $600^{\circ}C$, 200mTorr $O_2$ pressure for 2 J/$\textrm{cm}^2$ laser energy density. 14/50/50 PLZT thin film showed a maximum dielectric constant value of $\varepsilon$$_{r}$=1289.9 P-E hysteresis loop of 14/ 50/50 PLZT thin film was slim ferroelectric. Leakage current density of 14/50/50 PLZT thin film was 10/ sup -7/=A/$\textrm{cm}^2$.>.

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DRAM소자용 PLZT 박막의 두께에 따른 전기적 특성에 관한 연구 (A Study on Electrical Characteristics of the PLZT Thin Film Acorrding to Thickness for DRAM Capacitor)

  • 박용범;장낙원;마석범;김성구;최형욱
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 추계학술대회 논문집
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    • pp.278-281
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    • 1999
  • PLZT thin films on Pt/Ti/SiO$_2$/Si substrate were fabricated with different Thickness by pulsed laser deposition. 14/50/50 PLZT thin film showed a maximum dielectric constant value of $\varepsilon$$_{t}$=985 at 5000$\AA$, and $\varepsilon$$_{t}$=668 at 2000A. P-EI hysteresis loop of 14/50/50 PLZT thin film was slim ferroelectric. Leakage current density of 14/50/70 PLZT thin film was 10$^{-8}$ A/$\textrm{cm}^2$ at 2000$\AA$.EX>.

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에어로졸 증착법에 의한 압전 PZT 후막의 전기적 특성 (Electrical properties of piezoelectric PZT thick film by aerosol deposition method)

  • 김기훈;방국수;박동수;박찬
    • 한국결정성장학회지
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    • 제25권6호
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    • pp.239-244
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    • 2015
  • 에어로졸 증착법에 의해 실리콘 기판위에 $10{\sim}20{\mu}m$의 두께를 가진 PZT 후막을 제조한 후 $700^{\circ}C$에서 어닐링처리하였다. PZT 분말에 의해 제조된 막은 임피던스 분석기(impedance analyzer)와 쇼여-타워 서킷(Sawyer-Tower circuit)으로 분석하였다. PZT 분말은 통상적인 고상반응법 및 솔-젤 법으로 준비되었다. 고상반응법으로 만들어진 분말을 사용한 $10{\mu}m$ 두께 PZT 막의 잔류분극, 항전계 및 유전상수는 각각 $20{\mu}C/cm^2$, 30 kV/cm 그리고 1320이었다. 한편 솔-젤 법으로 제조된 분말을 사용한 경우의 유전상수는 635로 비교적 낮은 값을 나타낸다. 이는 어닐링시 생기는 발생하는 유기물에 의한 기공의 존재 때문이다.

Crystallization Behavior and Electrical Properties of BNN Thin Films by IBSD Process

  • Lou, Jun-Hui;Jang, Jae-Hoon;Lee, Hee-Young;Cho, Sang-Hee
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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    • pp.960-964
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    • 2004
  • [ $Ba_2NaNb_5O_{15}$ ](BNN) thin films have been prepared by the ion beam sputter deposition (IBSD) method on Pt coated Si substrate at temperature as low as $600^{\circ}C$ XRD, SEM were used to investigate the crystallization and microstructure of the films. It was found that the films were crack-free and uniform in microstructure. The electric properties of thin films were carried out by observation of D-E hysteresis loop, dielectric constant and leakage current. It was found the deposition rate strongly influenced the phase formation of the films, where the phase of $BaNb_2O_6$ was always formed when the deposition rate was high. However, the single phase (tungsten bronze structure ) BNN thin film was obtained with the deposition rate as low as $22{\AA}/min$. The remanent polarization Pr and dielectric constant are about 1-2 ${\mu}C/cm^2$ and $100\sim200$, respectively. It was also founded the electric properties of thin films were influenced by the deposition rate. The Pr and dielectric constant of films increased with the decrease of deposition rate. The effects of annealing temperature and annealing time to the crystallization behavior of films were studied. The crystallization of thin film started at about $600^{\circ}C$. The adequate crystallization was gotten at the temperature of $650^{\circ}C$ when the annealing time is 0.5 hour or at the temperature of $600^{\circ}C$ when the annealing time is long as 6 hours.

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메모리소자 응용을 위한 초박막의 제작 및 특성 평가 (Evaluation of the fabrications and properties of ultra-thin film for memory device application)

  • 정상현;최행철;김재현;박상진;김광호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.169-170
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    • 2006
  • In this study, ultra thin films of ferroelectric vinylidene fluoride-trifluoroethylene (VF2-TrFE) copolymer were fabricated on degenerated Si (n+, $0.002\;{\Omega}{\cdot}cm$) using by spin coating method. A 1~5 wt% diluted solution of purified vinylidene fluoride-trifluoroethylene (VF2:TrFE=70:30) in a dimethylformamide (DMF) solvent were prepared and deposited on silicon wafers at a spin rate of 2000~5000rpm for 30 seconds. After annealing in a vacuum ambient at $200^{\circ}C$ for 60 min, upper gold electrodes were deposited by vacuum evaporation for electrical measurement. X-ray diffraction results showed that the VF2-TrFE films on Si substrates had $\beta$-phase of copolymer structures. The capacitance on $n^+$-Si(100) wafer showed hysteresis behavior like a butterfly shape and this result indicates clearly that the dielectric films have ferroelectric properties. The typical measured remnant polarization (2Pr) and coercive filed (EC) values measured using a computer controlled a RT-66A standardized ferroelectric test system (Radiant Technologies) were about $0.54\;C/cm^2$ and 172 kV/cm, respectively, in an applied electric field of ${\pm}0.75\;MV/cm$.

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투광성 $Ba(La_{1/2}Nb_{1/2})O_3-PbZrO_3-PbTiO_3$ 세라믹의 강유전 및 전기광학 특성에 관한 연구 (A Study on the Ferroelectric and Electro-Optical Properties of the Transparent $Ba(La_{1/2}Nb_{1/2})O_3-PbZrO_3-PbTiO_3$ Ceramics)

  • 김준수;류기원;이성갑;이영희
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 추계학술대회 논문집 학회본부
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    • pp.325-328
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    • 1991
  • In this study, $0.085Ba(La_{1/2}Nb_{1/2})O_3-0.915Pb(Zr_yTi_{1-y})O_3$(y=0.45, 0.50, 0.55, 0.60, 0.65[mol]) transparent electrooptic ceramics were fabricated by two-stage sintering method. Increasing the $PbZrO_3$ contents, dielectric constant was increased and Curie temperature was decreased. In the composition of 0.55[mol] $PbZrO_3$, electromechanical coupling factor was 0.43. From the results of ferroelectric hysteresis loop and transmitted light intensity with electric field, the compositions of 0.65, 0.60, 0.55[mol] $PbZrO_3$ was applicable to electroopticmemory device and the compositions of 0.50, 0.45[mol] $PbZrO_3$ was applicable to linear electrooptic device.

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SiON buffer layer를 이용한 MFIS Capacitor의 제작 및 특성 (Fabrications and properties of MFIS capacitor using SiON buffer layer)

  • 정상현;정순원;인용일;김광호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.70-73
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    • 2001
  • MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

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