• Title/Summary/Keyword: Dielectric Post

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Effects of Interfacial Dielectric Layers on the Electrical Performance of Top-Gate In-Ga-Zn-Oxide Thin-Film Transistors

  • Cheong, Woo-Seok;Lee, Jeong-Min;Lee, Jong-Ho;KoPark, Sang-Hee;Yoon, Sung-Min;Byun, Chun-Won;Yang, Shin-Hyuk;Chung, Sung-Mook;Cho, Kyoung-Ik;Hwang, Chi-Sun
    • ETRI Journal
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    • v.31 no.6
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    • pp.660-666
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    • 2009
  • We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

Error Analysis for Microwave Permittivity Measurement using Post Resonator Method (Post Resonator 방법에 의한 마이크로파 유전율 측정에서의 오차 분석)

  • Cho, Mun-Seong;Lim, Donggun;Park, Jae-Hwan;Park, Jae-Gwan
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.3
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    • pp.43-48
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    • 2012
  • Errors of relative permittivity calculation caused by the variation of sample aspect ratio (diameter/height) and measuring geometry were analyzed by computer simulation and measurement. Firstly, the $S_{21}$ spectrum of the sample (permittivity 38) was simulated in the post resonator measuring apparatus by HFSS simulation. Then, the relative permittivity was calculated from the $TE_{011}$ mode resonant frequency. The relative permittivity varied by ca. 0.3% with sample aspect ratio variation (D/H=0.8~1.6). The relative permittivity varied by ca. 1~10% when the 1~10% of air-gap was introduced in between the dielectric disk and upper conductor. All the simulation results showed consistent tendency with real measurement.

Study of Post-silicidation Annealing Effect on SOI Substrate (SOI 기판에서 Silicide의 후속 공정 열처리 영향에 대한 연구)

  • Lee, Won-Jae;Oh, Soon-Young;Kim, Yong-Jin;Zhang, Ying-Ying;Zhong, Zhun;Lee, Shi-Guang;Jung, Soon-Yen;Kim, Yeong-Cheol;Wang, Jin-Suk;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.3-4
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    • 2006
  • In this paper, a nickel silicide technology with post-silicidation annealing effect for thin film SOI devices is investigated in detail. Although lower resistivity Ni silicide can be easily obtained at low forming temperature, poor thermal stability and changing of characteristic are serious problems during the post silicidation annealing like ILD (Inter Layer Dielectric) deposition or metallization. So these effects are observed as deposited Ni thickness differently on As doped SOI (Si film 30nm). Especially, the sheet resistance of Ni thickness deposited 20nm was lower than 30nm before the post silicidation annealing. But after the post silicidation annealing, the sheet resistance was changed. Therefore, in thin film SOI MOSFETs or Ni-FUSI technology that the Si film is less than 50nm, it is important to decide the thickness of deposited Ni in order to avoid forming high resistivity silicide.

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Structural and electrical characterizations of $HfO_{2}/HfSi_{x}O_{y}$ as alternative gate dielectrics in MOS devices (MOS 소자의 대체 게이트 산화막으로써 $HfO_{2}/HfSi_{x}O_{y}$ 의 구조 및 전기적 특성 분석)

  • 강혁수;노용한
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.45-49
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    • 2001
  • We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

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Effect of post annealing on the structural and electrical properties of $Ba_{0.5}Sr_{0.5}TiO_3$ films deposited on 4H-SiC (4H-SiC에 증착된 BST 박막의 열처리 효과에 따른 구조적, 전기적 특성)

  • Lee, Jae-Sang;Jo, Yeong-Deuk;Bahng, Wook;Kim, Sang-Cheol;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.196-196
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    • 2008
  • We have investigated that the effect of post annealing on the structural and electrical properties of $Ba_{0.5}Sr_{0.5}TiO_3$ thin films. The BST thin films were deposited on n-type 4H-silicon carbide(SiC) using pulsed laser deposition (PLD). The deposition was carried out in oxygen ambient 100mTorr for 5 minutes, which results in about 300nm-thick BST films. For the BST/4H-SiC, 200nm thick silver was deposited on the BST films bye-beam evaporation. The X-ray diffraction patterns of the BST films revealed that the crystalline structure of BST thin films has been improved after post-annealing at $850^{\circ}C$ for 1 hour. The root mean square (RMS) surface roughness of the BST film measured by using a AFM was increased after post-annealing from 5.69nm to 11.49nm. The electrical properties of BST thin film were investigated by measuring the capacitance-voltage characteristics of a silver/BST/4H-SiC structure. After the post-annealing, dielectric constant of the film was increased from 159.67 to 355.33, which can be ascribed to the enhancement of the crystallinity of BST thin films.

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Interfacial properties of ZrO$_2$ on silicon

  • Lin, Y.S.;Puthenkovilakam, R.;Chang, J.P.
    • Electrical & Electronic Materials
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    • v.16 no.9
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    • pp.65.1-65
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    • 2003
  • The interface of zirconium oxide thin films on silicon is analyzed in detail for their potential applications in the microelectronics. The formation of an interfacial layer of ZrSi$\sub$x/O$\sub$y. with graded Zr concentration is observed by the x-ray photoelectron spectroscopy and secondary ion mass spectrometry analysis. The as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y//Si sample is thermally stable up to 880$^{\circ}C$, but is less stable compared to the ZrO$_2$/SiO$_2$/Si samples. Post-deposition annealing in oxygen or ammonia improved the thermal stability of as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y/Si to 925$^{\circ}C$, likely due to the oxidation/nitridation of the interface. The as-deposited film had an equivalent oxide thickness of∼13 nm with a dielectric constant of ∼21 and a leakage current of 3.2${\times}$10e-3 A/$\textrm{cm}^2$ at 1.5V. Upon oxygen or ammonia annealing, the formation of SiO$\sub$x/ and SiH$\sub$x/N$\sub$y/O$\sub$z/ at the interface reduced the overall dielectric constants.

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Temperature Dependence on Electrical Characterization of Epitaxially Grown AIN film on 6H-SiC Structures (6H-SiC 위에 형성한 에피택시 AIN 박막 구조에 대한 전기적 특성의 평가온도 의존성)

  • Kim Yong-Seong;Kim Kwang-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.1
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    • pp.18-22
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    • 2006
  • Epitaxial aluminum nitride films on 6H-SiC (0001) were fabricated using reactive RF magnetron sputtering and post-deposition rapid thermal annealing. The electrical properties of AIN films depending on film thickness and measurement temperature have been observed. Full width at half maximum of AIN (0002) was $0.1204^{\circ}$ (about 430 arcsec) X-ray rocking curve results. The equivalent oxide thickness (EOT) of AIN film was estimated as about 10 nm and the leakage current density was within the order of $10^{-8} 4/cm^2$. The dielectric constant of AIN film estimated from the accumulation region of C-V curve measured at $300^{\circ}C$ was 8.3. The dynamic dielectric constant was obtained as 5.1 from J vs. 1/T plots at the temperature ranging from R.T. to $300^{\circ}C$ From above, estimation temperature dependance of the electrical properties of Al/AIN/SiC MIS devices was affirmed and useful data compilation for the reliabilities of SiC MIS is expected.

Electrical properties of PZN-PZT thick films formed by aerosol deposition process (에어로졸 증착법에 의해 제조된 PZN-PZT 후막의 전기적특성)

  • Tungalaltamir, Ochirkhuyag;Jang, Joo-Hee;Park, Yoon-Soo;Park, Dong-Soo;Park, Chan
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.30 no.5
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    • pp.183-188
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    • 2020
  • Lead zinc niobate (PZN)-added lead zirconate titanate (PZT) thick films with thickness of 5~10 ㎛ were fabricated on silicon and sapphire substrates using aerosol deposition method. The contents of PZN were varied from 0 %, 20 % and to 40 %. The PZN-added PZT film showed poorer electrical properties than pure PZT film when the films were coated on silicon substrate and annealed at 700℃. On the other hand, the PZN-added PZT film showed higher remanent polarization and dielectric constant values than pure PZT film when the films were coated on sapphire and annealed at 900℃. The ferroelectric and dielectric characteristics of 20 % PZN-added PZT films annealed at 900℃ were compared with the result values obtained from bulk ceramic specimen with same composition sintered at 1200℃. As annealing temperature increased, dielectric constant increased. These came from enhanced crystallization and grain growth by post heat treatment.

Effect of Surface Dielectric Barrier Discharge on the Physiological Activities of Quercetin

  • Kim, Hyun-Joo;Yong, Hae In;Park, Sanghoo;Park, Jooyoung;Jung, Samooel;Choe, Wonho;Jo, Cheorun
    • The Korean Journal of Food And Nutrition
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    • v.30 no.2
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    • pp.290-296
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    • 2017
  • In this study, using the surface dielectric barrier discharge (DBD) produced at atmospheric pressure to improve the physiological activities of quercetin was investigated. Quercetin (at 200 ppm) was treated using air DBD with an input power of 250 W. The tyrosinase inhibition effect and total phenolic content of quercetin increased from 38.96 to 91.58% and from 134.53 to 152.93 ppm, respectively, after 20 min of plasma treatment. The antioxidant activity of quercetin treated for 20 min in the lipid models was higher than that of quercetin treated for 0, 5, and 10 min. Furthermore, plasma-treated quercetin exhibited antimicrobial activity against Listeria monocytogenes, Salmonella Typhimurium, and Staphylococcus aureus, whereas activity was not shown in the control. Structural modifications of the quercetin molecule induced by plasma might be responsible for the improvements in its physiological activity. These results indicate that DBD plasma could be used to enhance the physiological activity of quercetin for various applications in food.