• Title/Summary/Keyword: Design memory management

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Design and Implementation of Memory Management for preventing a memory leakage on Real-Time Operating System, $\textrm{iRTOS}^{TM}$ (실시간 운영체제의 효율적인 메모리 관리 설계 및 구현)

  • 박윤미;이재규;이철훈
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.04a
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    • pp.175-177
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    • 2004
  • 최근 임베디드 시스템 분야에서의 실시간 운영체제는 정보가전을 비롯한 임베디드 시스템 등 적용범위가 점차 확대되는 추세이다. 실시간 운영체제는 다른 범용 운영체제와는 달리 시간 결정성을 보장하는 운영체제로서, 주로 자원(resource)이 한정된 시스템에 탑재되어야 하기 때문에 효율적인 자원관리가 필요하다. 시스템의 자원 중에서도 메모리는 실시간 운영체제의 실행에 있어서 꼭 필요한 자원이므로 이에 대한 효과적인 관리가 필수적이라 할 수 있다. 대부분 실시간 운영체제에서는 효율적인 메모리 관리를 위해서 동적 메모리 할당 방법을 채택하고 있다. 그러나 할당된 메모리를 해제하지 않고 종료되는 태스크로 인해 메모리 누수 문제가 발생하였다. 본 논문에서는 동적 메모리 할당에서 메모리 누수를 최소화 할 수 있도록 개선한 메모리 관리 기법을 설계 및 구현하였다.

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An On-chip Multiprocessor Miroprocessor with Shared MMU and Cache

  • Lee, Yong-Hwan;Jeong, Woo-Kyeong;An, Sang-Jun;Lee, Yong-Surk
    • Journal of Electrical Engineering and information Science
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    • v.2 no.4
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    • pp.1-7
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    • 1997
  • A multiprocessor microprocessor named SMPC(scaleable multiprocessor chip) that contains tow IU (integer unit) is presented in this paper. It can execute multiple instructions from several tasks exploiting task-level parallelism that is free from instruction dependencies, and provide high performance and throughput on both single program and multiprogramming environments. the IU is a 32-bit scalar processor expecially designed to boost up the performance of string manipulations which are frequently used in RDBMS(relational data base management system) applications. A memory management unit and a data cache shared by two IUs improve the performance and reduce the chip area required. ETH SMPC is implemented in VLSI circuit by custom design and automated design tools.

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Two-Tier Storage DBMS for High-Performance Query Processing

  • Eo, Sang-Hun;Li, Yan;Kim, Ho-Seok;Bae, Hae-Young
    • Journal of Information Processing Systems
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    • v.4 no.1
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    • pp.9-16
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    • 2008
  • This paper describes the design and implementation of a two-tier DBMS for handling massive data and providing faster response time. In the present day, the main requirements of DBMS are figured out using two aspects. The first is handling large amounts of data. And the second is providing fast response time. But in fact, Traditional DBMS cannot fulfill both the requirements. The disk-oriented DBMS can handle massive data but the response time is relatively slower than the memory-resident DBMS. On the other hand, the memory-resident DBMS can provide fast response time but they have original restrictions of database size. In this paper, to meet the requirements of handling large volumes of data and providing fast response time, a two-tier DBMS is proposed. The cold-data which does not require fast response times are managed by disk storage manager, and the hot-data which require fast response time among the large volumes of data are handled by memory storage manager as snapshots. As a result, the proposed system performs significantly better than disk-oriented DBMS with an added advantage to manage massive data at the same time.

Sparse Matrix Compression Technique and Hardware Design for Lightweight Deep Learning Accelerators (경량 딥러닝 가속기를 위한 희소 행렬 압축 기법 및 하드웨어 설계)

  • Kim, Sunhee;Shin, Dongyeob;Lim, Yong-Seok
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.17 no.4
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    • pp.53-62
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    • 2021
  • Deep learning models such as convolutional neural networks and recurrent neual networks process a huge amounts of data, so they require a lot of storage and consume a lot of time and power due to memory access. Recently, research is being conducted to reduce memory usage and access by compressing data using the feature that many of deep learning data are highly sparse and localized. In this paper, we propose a compression-decompression method of storing only the non-zero data and the location information of the non-zero data excluding zero data. In order to make the location information of non-zero data, the matrix data is divided into sections uniformly. And whether there is non-zero data in the corresponding section is indicated. In this case, section division is not executed only once, but repeatedly executed, and location information is stored in each step. Therefore, it can be properly compressed according to the ratio and distribution of zero data. In addition, we propose a hardware structure that enables compression and decompression without complex operations. It was designed and verified with Verilog, and it was confirmed that it can be used in hardware deep learning accelerators.

Design of Real Time Task Scheduling for Line Controller of Continuous Manufacturing Process Automation (연속 공정 자동화를 위한 라인 제어기에서의 실시간 작업 스케쥴링에 관한 연구)

  • Lee, Joon-Soo;Cho, Young-Jo;Lim, Mee-Seub;Park, Jung-Min;Choy, Ick;Lim, Jun-Hong;Kim, Kwang-Bae
    • Proceedings of the KIEE Conference
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    • 1992.07a
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    • pp.365-368
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    • 1992
  • This paper presents an approach to the design of real time task scheduling for a line controller of continuous manufacturing process automation. The line controller has multiprocessor-based architecture with shared memory and is operated by firmware. This firmware contains menu-driven software supporting real-time database management and fuction-block control language. The multitasking line control processor performs the following three functions: 1) interprets the function block control language by virtue of shared memory in the database; 2) invokes an interupt service routine as required by external hardware; 3) detects errors and notifies the user. We propose real time task scheduling method.

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A MAC System Design for High-speed UWB SoC (고속 UWB SoC의 MAC 시스템 설계)

  • Kim, Do-Hoon;Wee, Jeong-Wook;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.4
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    • pp.1-5
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    • 2011
  • We present the implementation of MAC system for MBOA UWB SoC. The implemented MBOA MAC algorithm is not master control mechanism, but distributed network mechanism. Therefore, mesh network can be easily constructed because MAC consists of distributed network and administrates network. The ARM926EJ with cache is adopted for high performnace and AMBA bus is applied for system design and reuse. In addition, the system operating clock management algorithm is implemented for low power consumption. The dedicated DMA for MAC is designed between the system memory buffer and MAC hardware, and the dedicated DMA for USB 2.0 is also implemented between system memory buffer and host for high data transaction.

E-Commerce Performance Based on Knowledge Management and Organizational Innovativeness

  • LESTARI, Setyani Dwi;MUHDALIHA, Eryco;PUTRA, Aditya Halim Perdana Kusuma
    • Journal of Distribution Science
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    • v.18 no.2
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    • pp.49-58
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    • 2020
  • Purpose: This study focuses on the performance of the strategy of Indonesia's companies in facing the development of e-commerce business. The relationship between Knowledge Management (Organizational Memory, Knowledge Sharing, Knowledge Absorption, Knowledge Acceptance), Organizational Innovativeness, Competitive Advantage (Time, Quality, Cost, Flexibility) and E-Commerce (Humanistic Factors: Management, Competence, Organizational Structures) examined in this case study. Research design, data, and methodology: This study uses two types such us qualitative and quantitative. A survey approach were conducted to collect data from the Group of Companies (Director and Manager), Academician (Lecturer), Regulator (Head of Government Institution Division), and Master of Management (at least five years). Total of 114 samples was collected and processed for statistical analysis using Smart PLS. Results: This study provide the findings proved that Knowledge Management and Organization Innovativeness simultaneously have positive influence on Competitive Advantage, while Knowledge Management, Organization Innovativeness, and Competitive Advantage simultaneously have positive influence on E-commerce where Competitive Advantage positively influence to E-commerce. Conclusions: The implementation of strategies or steps in this study are expected to steer and motivate an organization to successfully implement a good knowledge management system to pass on knowledge from generation to generation in the company Organizational Innovativeness strategies to improve e-commerce performance.

Design of a One-Time Programmable Memory Cell for Power Management ICs (Power Management IC용 One-Time Programmable Memory Cell 설계)

  • Jeon, Hwang-Gon;Yu, Yi-Ning;Jin, Li-Yan;Kim, Du-Hwi;Jang, Ji-Hye;Lee, Jae-Hyung;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.84-87
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    • 2010
  • We manufacture an antifuse OTP (One-time programmable) cell for analog trimming which will be used in power management ICs. For the antifuse cell using dual program voltage of VPP (=7V) and VNN (=-5V), the thin gate oxide is broken down by applying a voltage higher than the hard break-down voltage to the terminals of the antifuse. The area of the manufactured antifuse OTP cell using $0.18{\mu}m$ BCD process is $48.01{\mu}m^2$ and is about 44.6 percent of that of an eFuse cell. The post-program resistances of the antifuse are good with the values under several kilo ohms when we measure twenty test patterns.

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Social Network based Sensibility Design Recommendation using {User - Associative Design} Matrix (소셜 네트워크 기반의 {사용자 - 연관 디자인} 행렬을 이용한 감성 디자인 추천)

  • Jung, Eun-Jin;Kim, Joo-Chang;Jung, Hoill;Chung, Kyungyong
    • Journal of Digital Convergence
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    • v.14 no.8
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    • pp.313-318
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    • 2016
  • The recommendation service is changing from client-server based internet service to social networking. Especially in recent years, it is serving recommendations with personalization to users through crowdsourcing and social networking. The social networking based systems can be classified depending on methods of providing recommendation services and purposes by using memory and model based collaborative filtering. In this study, we proposed the social network based sensibility design recommendation using associative user. The proposed method makes {user - associative design} matrix through the social network and recommends sensibility design using the memory based collaborative filtering. For the performance evaluation of the proposed method, recall and precision verification are conducted. F-measure based on recommendation of social networking is used for the verification of accuracy.

The Ontology based Context Aware System Design for Efficient Memory Management of a Vehicle Black Box (차량용 블랙박스 메모리의 효율적인 관리를 위한 온톨로지 기반의 상황인지 시스템 설계)

  • Park, Ji-Sang;Jeon, Min-Ho;Lee, Myung-Eui
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.1
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    • pp.475-481
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    • 2014
  • Recently, it is used to apply various improved methods to determine the cause of traffic accidents. However, most of vehicle black box usually start to store the video information by an event trigger in case that the impact value at that time exceeds the threshold impact value as compared the threshold impact value saved in advance with the current impact value. there are problems with above method that a lot video information should be saved in the memory card of the vehicle black box, and the user should delete the unwanted video information every time because of unclassified video store. In this paper, we propose the ontology-based context aware algorithm that the vehicle black box recognize the situation, and then remove the video data with a low weighting factor by itself for efficient memory management.