• Title/Summary/Keyword: Deep silicon etching

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The Study for Investigation of the sufficient vertical profile with reducing loading effect for silicon deep trench etching (Vertical Profile Silicon Deep Trench Etch와 Loading effect의 최소화에 대한 연구)

  • Kim, Sang-Yong;Jeong, Woo-Yang;Yi, Keun-Man;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.118-119
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    • 2009
  • This paper presents the feature profile evolution silicon deep trench etching, which is very crucial for the commercial wafer process application. The silicon deep trenches were etched with the SF6 gas & Hbr gas based process recipe. The optimized silicon deep trench process resulted in vertical profiles (87o~90o) with loading effect of < 1%. The process recipes were developed for the silicon deep trench etching applications. This scheme provides vertically profiles without notching of top corner was observed. In this study, the production of SF6 gas based silicon deep trench etch process much more strongly than expected on the basis of Hbr gas trench process that have been investigated by scanning electron microscope (SEM). Based on the test results, it is concluded that the silicon deep trench etching shows the sufficient profile for practical MOS FET silicon deep trench technology process.

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Characterization of Deep Dry Etching of Silicon Single Crystal by HDP (HDP를 이용한 실리콘 단결정 Deep Dry Etching에 관한 특성)

  • 박우정;김장현;김용탁;백형기;서수정;윤대호
    • Journal of the Korean Ceramic Society
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    • v.39 no.6
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    • pp.570-575
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    • 2002
  • The present tendency of electrical and electronics is concentrated on MEMS devices for advantage of miniaturization, intergration, low electric power and low cost. Therefore it is essential that high aspect ratio and high etch rate by HDP technology development, so that silicon deep trench etching reactions was studied by ICP equipment. Deep trench etching of silicon was investigated as function of platen power, etch step time of etch/passivation cycle time and SF$\_$6/:C$_4$F$\_$8/ flow rate. Their effects on etch profile, scallops, etch rate, uniformity and selectivity were also studied.

The Development of Deep Silicon Etch Process with Conventional Inductively Coupled Plasma (ICP) Etcher (범용성 유도결합 플라즈마 식각장비를 이용한 깊은 실리콘 식각)

  • 조수범;박세근;오범환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.7
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    • pp.701-707
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    • 2004
  • High aspect ratio silicon structure through deep silicon etching process have become indispensable for advanced MEMS applications. In this paper, we present the results of modified Bosch process to obtain anisotropic silicon structure with conventional Inductively Coupled Plasma (ICP) etcher instead of the expensive Bosch process systems. In modified Bosch process, etching step ($SFsub6$) / sidewall passivation ($Csub4Fsub8$) step time is much longer than commercialized Bosch scheme and process transition time is introduced between process steps to improve gas switching and RF power delivery efficiency. To optimize process parameters, etching ($SFsub6$) / sidewall passivation ($Csub4Fsub8$) time and ion energy effects on etching profile was investigated. Etch profile strongly depends on the period of etch / passivation and ion energy. Furthermore, substrate temperature during etching process was found to be an important parameter determining etching profile. Test structures with different pattern size have been etched for the comparison of the aspect ratio dependent etch rate and the formation of silicon grass. At optimized process condition, micropatterns etched with modified Bosch process showed nearly vertical sidewall and no silicon grass formation with etch rate of 1.2 ${\mu}{\textrm}{m}$/ min and the size of scallop of 250 nm.

Fabrication of Hollow-type Silicon Microneedle Array Using Microfabrication Technology (반도체 미세공정 기술을 이용한 Hollow형 실리콘 미세바늘 어레이의 제작)

  • Kim, Seung-Kook;Chang, Jong-Hyeon;Kim, Byoung-Min;Yang, Sang-Sik;Hwang, In-Sik;Pak, Jung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2221-2225
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    • 2007
  • Hollow-type microneedle array can be used for painless, continuous and stable drug delivery through a human skin. The needles must be sharp and have sufficient length in order to penetrate the epidermis. An array of hollow-type silicon microneedles was fabricated by using deep reactive ion etching and HNA wet etching with two oxide masks. Isotropic etching was used to create tapered tips of the needles, and anisotropic etching of Bosch process was used to make the extended length and holes of microneedles. The microneedles were formed by three steps of isotropic, anisotropic, and isotropic etching in order. The holes were made by one anisotropic etching step. The fabricated microneedles have $170{\mu}m$ width, $40{\mu}m$ hole diameter and $230{\mu}m$ length.

Silicon trench etching using inductively coupled Cl2/O2 and Cl2/N2 plasmas

  • Kim, Hyeon-Soo;Lee, Young-Jun;Young, Yeom-Geun
    • Journal of Korean Vacuum Science & Technology
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    • v.2 no.2
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    • pp.122-132
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    • 1998
  • Characteristics of inductively coupled Cl2/O2 and Cl2/N2 plasmas and their effects on the formation of submicron deep trench etching of single crystal silicon have been investigated using Langmuir probe, quadrupole mass spectrometer (QMS), X-ray photoelectron spectroscopy (XPS), and scanning electron microscopy (SEM), Also, when silicon is etched with oxygen added chlorine plasmas, etch products recombined with oxygen such as SiClxOy emerged and Si-O bondings were found on the etched silicon surface. However, when nitrogen is added to chlorine, no etch products recombined with nitrogen nor Si-N bondings were found on the etched silicon surface. When deep silicon trenches were teached, the characteristics of Cl2/O2 and Cl2/N2 plasmas changed the thickness of the sidewall residue (passivation layer) and the etch profile. Vertical deep submicron trench profiles having the aspect ratio higher than 5 could be obtained by controlling the thickness of the residue formed on the trench sidewall using Cl2(O2/N2) plasmas.

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Characteristics silicon pressure sensor using dry etching technology (건식식각 기술 이용한 실리콘 압력센서의 특성)

  • Woo, Dong-Kyun;Lee, Kyung-Il;Kim, Heung-Rak;Suh, Ho-Cheol;Lee, Young-Tae
    • Journal of Sensor Science and Technology
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    • v.19 no.2
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    • pp.137-141
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    • 2010
  • In this paper, we fabricated silicon piezoresistive pressure sensor with dry etching technology which used Deep-RIE and etching delay technology which used SOI(silicon-on-insulator) wafer. We improved pressure sensor offset and its temperature dependence by removing oxidation layer of SOI wafer which was used for dry etching delay layer. Sensitivity of the fabricated pressure sensor was about 0.56 mV/V${\cdot}$kPa at 10 kPa full-scale, and nonlinearity of the fabricated pressure sensor was less than 2 %F.S. The zero off-set change rate was less than 0.6 %F.S.

Design and Fabrication of Electrostatic Inkjet Head using Silicon Micromachining Technology

  • Kim, Young-Min;Son, Sang-Uk;Choi, Jae-Yong;Byun, Do-Young;Lee, Suk-Han
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.121-127
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    • 2008
  • This paper presents design and fabrication of optimized geometry structure of electrostatic inkjet head. In order to verify effect of geometry shape, we simulate electric field intensity according to the head structure. The electric field strength increases linearly with increasing height of the micro nozzle. As the nozzle diameter decreases, the electric field along the periphery of the meniscus can be more concentrated. We design and fabricate the electrostatic inkjet heads, hole type and pole type, with optimized structure. It was fabricated using thick-thermal oxidation and silicon micromachining technique such as the deep reactive ion etching (DRIE) and chemical wet etching process. It is verified experimentally that the use of the MEMS inkjet head allows a stable and sustainable micro-dripping mode of droplet ejection. A stable micro dripping mode of ejection is observed under the voltages 2.5 kV and droplet diameter is $10\;{\mu}m$.

Fabrication and Characterization of Silicon Probe Tip for Vertical Probe Card Using MEMS Technology

  • Kim, Young-Min;Yu, In-Sik;Lee, Jong-Hyun
    • KIEE International Transactions on Electrophysics and Applications
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    • v.4C no.4
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    • pp.149-154
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    • 2004
  • This paper presents a silicon probe tip for vertical probe card application. The silicon probe tip was fabricated using MEMS technology such as porous silicon micromachining and deep- RIE (reactive ion etching). The thickness of the silicon epitaxial layers was 5 ${\mu}{\textrm}{m}$ and 7 ${\mu}{\textrm}{m}$, respectively. The width and length were 40 ${\mu}{\textrm}{m}$ and 600 ${\mu}{\textrm}{m}$, respectively. The probe structure was a multilayered structure and was composed of Au/Ni-Cr/Si$_3$N$_4$/n-epi layers. The height of the curled probe tip was measured as a function of the annealing temperature and time. Resistance characteristics of the probe tip were measured using a touchdown test.

The Effect of Mask Patterns on Microwire Formation in p-type Silicon (P-형 실리콘에서 마이크로 와이어 형성에 미치는 마스크 패턴의 영향)

  • Kim, Jae-Hyun;Kim, Kang-Pil;Lyu, Hong-Kun;Woo, Sung-Ho;Seo, Hong-Seok;Lee, Jung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.418-418
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    • 2008
  • The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

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Optimization of Etching Profile in Deep-Reactive-Ion Etching for MEMS Processes of Sensors

  • Yang, Chung Mo;Kim, Hee Yeoun;Park, Jae Hong
    • Journal of Sensor Science and Technology
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    • v.24 no.1
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    • pp.10-14
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    • 2015
  • This paper reports the results of a study on the optimization of the etching profile, which is an important factor in deep-reactive-ion etching (DRIE), i.e., dry etching. Dry etching is the key processing step necessary for the development of the Internet of Things (IoT) and various microelectromechanical sensors (MEMS). Large-area etching (open area > 20%) under a high-frequency (HF) condition with nonoptimized processing parameters results in damage to the etched sidewall. Therefore, in this study, optimization was performed under a low-frequency (LF) condition. The HF method, which is typically used for through-silicon via (TSV) technology, applies a high etch rate and cannot be easily adapted to processes sensitive to sidewall damage. The optimal etching profile was determined by controlling various parameters for the DRIE of a large Si wafer area (open area > 20%). The optimal processing condition was derived after establishing the correlations of etch rate, uniformity, and sidewall damage on a 6-in Si wafer to the parameters of coil power, run pressure, platen power for passivation etching, and $SF_6$ gas flow rate. The processing-parameter-dependent results of the experiments performed for optimization of the etching profile in terms of etch rate, uniformity, and sidewall damage in the case of large Si area etching can be summarized as follows. When LF is applied, the platen power, coil power, and $SF_6$ should be low, whereas the run pressure has little effect on the etching performance. Under the optimal LF condition of 380 Hz, the platen power, coil power, and $SF_6$ were set at 115W, 3500W, and 700 sccm, respectively. In addition, the aforementioned standard recipe was applied as follows: run pressure of 4 Pa, $C_4F_8$ content of 400 sccm, and a gas exchange interval of $SF_6/C_4F_8=2s/3s$.