• 한국전기전자재료학회논문지
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• 제29권12호
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• pp.750-758
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• 2016

For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, $BF_2$ and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with $C^{{+}{+}}$ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

• 한국항해항만학회:학술대회논문집
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• 한국항해항만학회 2000년도 추계학술대회논문집
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• pp.17-20
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• 2000

This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\sub$p/ (projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.

• 전자공학회논문지A
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• 제33A권4호
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• pp.112-120
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• 1996

With the MOsES (mask oxide sidewall etch scheme)process which uses the conventional i-line stepper and isotropic wet etching, CMOSFET's with fine gate pattern of 0.1.mu.m CMOSFET device, the screening oxide is deposited before the low energy ion implantation for source/drain extensions and two step sidewall scheme is adopted. Through the characterization of 0.1.mu.m CMOSFET device, it is found that the screening oxide deposition sheme has larger capability of suppressing the short channel effects than two step sidewall schem. In cse of 200.angs.-thick screening oxide deposition, both NMOSFET and PMOSFET maintain good subthreshold characteristics down to 0.1.mu.m effective channel lengths, and show affordable drain saturation current reduction and low impact ionization rates.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.97-98
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• 2006

High current behaviors of extended drain n-type metal-oxide-semiconductor field effects transistor (EDNMOS) with double polarity source (DPS) for electrostatic discharge (ESD) protection are analyzed. Simulation based contour analyses reveal that combination of bipolar junction transistor operation and deep electron channeling induced by high electron injection gives rise to the second on-state. Therefore, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.17-20
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• 2000

This study is about a retrograde triple well employed in the Cell tr. of next DRAM and flash memory. Triple well structure is formed deep n-well under the light p-well using MeV ion implantation. MeV P implanted deep n-well was observed to show greatly improved characteristics of electrical isolation and soft error. Junction leakage current, however, showed a critical behavior as a function of implantation and annealing conditions. {311} defects were observed to be responsible for the leakage current. {311} defects were generated near the R$\_$p/ (Projected range) region and grown upward to the surface during annealing. This is study on the defect behavior in device region as a function of implantation and annealing conditions.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.497-500
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• 2001

Due to their better photosensitivity in X-ray, the amorphous selenium based photoreceptor is widely used on the X-ray conversion materials. It was possible to control the charge carrier transport of amorphous selenium by suitably alloying a-Se with other elements(e,g. As, Cl). The charge transport properties of amorphous Selenium is decided on hole which is induced from metal to selenium in metal-selenium junction and which is transferred in a-Se bulk. This phenomenon is resulted of changing electric field owing to increasing of space charge by deep trap of a-Se bulk. In this paper, We dopped the chlorine to compensate deep hole trap and deposited blocking layer using dielectric material to prevent from increasing space charge for injection charge between metal electrode and a-Se layer. We compared space charge and the decreasing of trap density through measuring dark and photo current.

• Archives of Plastic Surgery
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• 제33권6호
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• pp.761-763
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• 2006

Purpose: Malignant peripheral nerve sheath tumors most often arise from the anatomically discernible peripheral nerve or neurofibroma. Methods: A 55-year-old man had a rapidly growing pedunculated large mass on the sacrolumbar junction for 2 years. He has congenital neurofibromatosis type I. He had multiple caf-au-lait spots and multiple neurofibromas on the entire body. The mass developed from a subcutaneous nodule on the sacrolumbar junction and grew rapidly. The preoperative punch biopsy revealed a malignant peripheral nerve tumor. The mass was completely excised with 1 cm free margin above the deep fascial plane. Results: There was no evidence of recurrence of tumor for 19 months of follow-up examination. Conclusion: Malignant peripheral nerve sheath tumor is very rare and has unique feature. We report a successful case of malignant peripheral nerve sheath tumor with the review of the literatures.

• 대한수의학회지
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• 제41권1호
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• pp.85-87
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• 2001

A case of disseminated lymphoblastic lymphosarcoma is reported in an aborted bovine fetus 7 month in gestation. Grossly, numerous tan firm nodules, 2 to 5 mm in diameter were scattered throughout the myocardium and skeletal muscle. The corticomedullary junction of the kidney was discolored to whitish tinct. Histologically, compact sheet of monomorphic lymphoblastic lymphoid cell infiltration was noted in the myocardium and skeletal muscle. Neoplastic cell infiltration was also noted in the corticomeullary junction and deep cortical regions of the kidney, lung and the liver. This is believed to be the first reported case of lymphosarcoma in an aborted bovine fetus in Korea.

• 한국터널지하공간학회 논문집
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• 제20권5호
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• pp.823-837
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• 2018

도심지 교통정체를 해소하고 지상공간 활용도를 높이기 위해 세계 각국에서는 단일 면적에 최대 교통량을 확보할 수 있고 저수공간등 다목적 활용이 가능한 복층 터널 건설이 각국에서 진행되고 있다. 최근 국내에서도 복층터널 시공에 대한 수요가 증가하고 있으며 단일 노선 복층터널뿐만 아니라 지중에서의 분 합류부 및 교차로 시공까지 가능한 네트워크형 복층터널 개발 연구가 진행 중에 있다. 네트워크형 복층터널에서 지중 분기부 및 합류부 시공 시 형성되는 필라부는 복층터널 본선부와 분기터널간의 상호 간섭효과에 의해 응력집중이 발생되는 취약부로 지반조건에 따른 보강공법 적용이 필요하다. 본 논문은 강연선을 사용하여 loop 형태로 필라부를 구속함으로써 다축 방향으로 구속력을 발휘할 수 있는 보강공법을 제시하였다. 이 방법의 검증을 위하여 실제 복층터널 필라 형성부와 복층터널 상하부에서의 분기되는 구간을 각각 모델링하여 수치해석을 수행하였다. 이를 통해 적정 필라폭 확보에 대한 방안을 제시하였고 기존 보강방법과의 비교 및 보강효과에 대한 수치해석적 검증을 수행하여 실제 현장 적용 전 복층터널 분기부 시공방안을 강구하였다.

• 한국정보통신학회논문지
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• 제20권2호
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• pp.306-316
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• 2016

본 논문에서는 프로그램 선택 소자는 채널 폭이 큰 NMOS (N-channel MOSFET) 트랜지스터 대신 DNW (Deep N-Well) 안에 형성된 채널 폭이 작은 isolated NMOS 트랜지스터의 body인 PW (P-Well)과 source 노드인 n+ diffusion 영역 사이에 형성된 기생하는 접합 다이오드를 사용하는 NMOS-Diode eFuse OTP (One-Time Programmable) 셀을 제안하였다. 제안된 eFuse OTP 셀은 프로그램 모드에서 NMOS 트랜지스터에 형성되는 기생하는 접합 다이오드를 이용하여 eFuse를 blowing 시킨다. 그리고 읽기 모드에서는 접합 다이오드를 이용하는 것이 아니고 NMOS 트랜지스터를 이용하기 때문에 다이오드의 contact voltage 강하를 제거할 수 있으므로 '0' 데이터에 대한 센싱불량을 제거할 수 있다. 또한 읽기 모드에서 채널 폭이 작은 NMOS 트랜지스터를 이용하여 BL에 전압을 전달하므로 OTP 셀의 blowing되지 않은 eFuse를, 통해 흐르는 읽기 전류를 $100{\mu}A$ 이내로 억제하여 blowing되지 않은 eFuse가 blowing되는 문제를 해결할 수 있다.