• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.19-24
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• 2021

As the size of semiconductor devices decreases, the etching pattern becomes very narrow and a deep high aspect ratio process becomes important. The cryogenic etching process enables high aspect ratio etching by suppressing the chemical reaction of reactive ions on the sidewall while maintaining the process temperature of -100℃. ESC is an important part for temperature control in cryogenic etching equipment. Through the cooling path inside the ESC, liquid nitrogen is used as cooling water to create a cryogenic environment. And since the ESC directly contacts the wafer, it affects the temperature uniformity of the wafer. The temperature uniformity of the wafer is closely related to the yield. In this study, the cooling path was designed and analyzed so that the wafer could have a uniform temperature distribution. The optimal cooling path conditions were obtained through the analysis of the shape of the cooling path and the change in the speed of the coolant. Through this study, by designing ESC with optimal temperature uniformity, it can be expected to maximize wafer yield in mass production and further contribute to miniaturization and high performance of semiconductor devices.

• Journal of Sensor Science and Technology
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• v.16 no.1
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• pp.62-67
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• 2007

This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin (Au/Sn) eutectic solder bonding. The membrane chip has 2.5 mm${\times}$2.5 mm, $0.5{\mu}m$ thick low stress silicon nitride membrane, 2 mm${\times}$2 mm Au/Ni/Cr membrane electrode, and $3{\mu}m$ thick Au/Sn layer. The backplate chip has 2 mm${\times}$2 mm, $150{\mu}m$ thick single crystal silicon rigid backplate, 1.8 mm${\times}$1.8 mm backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50-60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is $39.8{\mu}V/Pa$ (-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.2
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• pp.195-202
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• 2004

This paper presents the fabrication and evaluation of mechanical behavior for a peristaltic micropump by flow simulation. The valve-less micropump using the diffuser/nozzle is consists of the lower plate, the middle plate, the upper plate and the tube that connects inlet and outlet of the pump. The lower plate includes the channel and the chamber, and the plain middle plate are made of glass and actuated by the piezoelectric translator. Channels and a chamber on the lower plate are fabricated on high processability silicon wafer by the DRIE(Deep Reactive Ion Etching) process. The upper plate does the roll of a pump cover and has inlet/outlet/electric holes. Three plates are laminated by the aligner and bonded by the anodic bonding process. Flow simulation is performed using error-reduced finite volume method (FVM). As results of the flow simulation and experiments, the single chamber pump has severe flow problems, such as a backflow and large fluctuation of a flow rate. It is proved that the double-chamber micropump proposed in this paper can reduce the drawback of the single-chamber one.

• KSTLE International Journal
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• v.3 no.2
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• pp.101-109
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• 2002

This paper presents the fabrication and performance inspection of a peristaltic micropump by flow simulation. The valve-less micropump using the diffuser/nozzle is consists of base plate, mid plate, top plate and connection tubes fur inlet and outlet. In detail, the base plate is composed of two diffuser nozzles and three chambers, the mid plate consists of a glass diaphragm for the volumetric change of the pumping chamber. The inlet and outlet tubes are connected at the top plate and the actuator fur pressing the diaphragm is located beneath the top plate. The micropump is fabricated on the silicon wafer by DRIE (Deep Reactive ion Etching) process. The pumping performances are tested by the pneumatic test rig and compared with the simulated results fur various dimensions of diffuser nozzles. The pumping characteristics of the micropump by the volumetric change at the pumping chamber is modeled and simulated by the commercial software of FLOW-3D. The simulated results shows that reverse flow is the inherent phenomena in the diffuser nozzle type micropump, but it can be reduced at the dual pumping chamber model.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.16 no.12 s.117
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• pp.1272-1278
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• 2006

This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin(Au/Sn) eutectic solder bonding. The membrane chip has $2.5mm{\times}2.5mm$, 0.5${\mu}m$ thick low stress silicon nitride membrane, $2mm{\times}2mm$ Au/Ni/Cr membrane electrode, and 3${\mu}m$ thick Au/Sn layer. The backplate chip has $2mm{\times}2mm$, 150${\mu}m$ thick single crystal silicon rigid backplate, $1.8mm{\times}1.8mm$ backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50{\sim}60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is 39.8 ${\mu}V/Pa$(-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.30 no.2 s.245
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• pp.157-163
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• 2006

Our research dealt with micro fabrication using micro forming process. The goal of the research was to establish the limit of forming process concerning the size of forming material and formed shape. Flat-rolled ultra thin metallic foils of pure copper(3.0 and $1.0{\mu}m$ in thickness)and stainless steel($2.5{\mu}m$ in thickness) were used for forming material. We obtained the various shapes of micro channels as using designed forming process. $12-14{\mu}m$ wide and $9{\mu}m$ deep channels were made on $3.0{\mu}m$ thick foil and $6{\mu}m$ wide and $3{\mu}m$deep channels were made on $1.0{\mu}m$ thick foil. Si wafer die for forming was fabricated by using etching technique. And the relation of etching time and die dimension was investigated for fabricating precisely die groove. For the forming, die and metal foil were vacuum packed and the forming was conducted with a cold isostatic press. The formed channels were examined in terms of their dimension, surface qualities and potential for defects. Base on the examinations, formability of ultra thin metallic foil was also discussed. Finally, we compared the forming result with simulation. The result of research showed that metal forming technology is promising to produce micro parts.

• Korean Journal of Materials Research
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• v.9 no.1
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• pp.104-107
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• 1999

We investigated the effects of cooling condition on deep levels and iron precipitate formation in iron-contaminated p-type silicon by DLTS(Deep Level Transient Spectroscopy) and preferential etching technique. Dependency of cooling condition on Bulk Micro-Defect (BMD) and four different iron-related deep traps were observed. For normal cooling condition, T1, T2, T3, T4 traps that related to Fe\ulcorner or Fe-O complex were obtained. However, the trap with activation energy, 0.4 eV was observed for slow cooling condition. The trap caused by the $\textrm{Fe}^{+}\textrm{}^{-}$ pair (H4:0.56eV) were detected only at the case of $\textrm{LN}_{2}$ quenching condition.

• Journal of the Semiconductor & Display Technology
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• v.7 no.1
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• pp.1-5
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• 2008

In this paper, we fabricated pressure difference type gas flow sensor using only dry etching technology by ICP-RIE(inductive coupled plasma reactive ion etching). The sensor's structure consists of a common shear stress type piezoresistive pressure sensor with an orifice fabricated in the middle of the sensor diaphragm. Generally, structure like diaphragm is fabricated by wet etching technology using TMAH, but we fabricated diaphragm by only dry etching using ICP-RIE. To equalize the thickness of diaphragm we applied insulator($SiO_2$) layer of SOI(Si/$SiO_2$/Si-sub) wafer as delay layer of dry etching. Size of fabricated diaphragm is $1000{\times}1000{\times}7\;{\mu}m^3$ and overall chip $3000{\times}3000{\times}7\;{\mu}m^3$. We measured the variation of output voltage toward the change of gas pressure to analyze characteristics of the fabricated sensor. Sensitivity of fabricated sensor was relatively high as about 1.5mV/V kPa at 1kPa full-scale. Nonlinearity was below 0.5%F.S. Over-pressure range of the fabricated sensor is 100kPa or more.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.12
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• pp.1069-1074
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• 2005

In this work, nano-needle structures ate formed to solve problem, related to low density of quantum dots for nano floating gate memory. Such structures ate fabricated and electrical properties' of MIS devices fabricated on the nano-structures are studied. Nano floating gate memory based on quantum dot technologies Is a promising candidate for future non-volatile memory devices. Nano-structure is fabricated by reactive ion etching using $SF_6$ and $O_2$ gases in parallel RF plasma reactor. Surface morphology was investigated after etching using scanning electron microscopy Uniform and packed deep nano-needle structure is established under optimized condition. Photoluminescence and capacitance-voltage characteristics were measured in $Al/SiO_2/Si$ with nano-needle structure of silicon. we have demonstrated that the nano-needle structure can be applicable to non-volatile memory device with increased charge storage capacity over planar structures.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.257-257
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• 2010

디스플레이 산업의 발달로 화상 영상폰, 디지털 카메라, MP4, PMP, 네비게이션, LCD TV등의 가전 제품의 수요증가에 따라 이에 장착되는 LCD 패널의 생산력 향상과 원가 절감을 위한 검사 기술이 요구되고 있다. LCD 검사를 위한 Probe unit은 미세전기기계시스템(MEMS) 공정을 이용하여 제작된다. LCD 검사용 Probe unit는 LCD 가장자리 부분에 전기적 신호(영상신호, 등 기신호, 색상신호)가 인가되도록 하는 수 십 내지 수 백개의 접속 단자가 고밀도로 배치되는데, 이러한 LCD는 제품에 장착되기 전에 시험신호를 인가하여 화면의 불량여부를 검사하기 위한 점등용 부품으로 50 um 이하의 Pin간 거리를 유지하면서 정확한 Pin Alignment를 요구하는 초정밀 부품이다. 본 연구에서는 반도체용 Si wafer에 마스크 공정 및 slit etching 공정을 적용하여 목표인 30 um pitch의 Probe unit을 개발하기 위해 Deep Si Etching(DRIE) 장비를 이용하여 식각 공정에 따른 특성을 평가하였다. 마스크 공정은 500 um 두께의 양면 연마된 반도체용 Si wafer를 이용하였으며, thick PR을 사용하여 마스킹하여 식각공정을 수행하였다. Si 깊은 식각은 $SF_6$ 가스와 Passivation용으로 $C_4F_8$ 가스를 교대로 사용하여 수직방향으로 깊은 식각이 이루어지는 원리이다. SEM 측정 결과 30 um pitch의 공정 목표에 도달하였으며, 식각공정 결과 식각율 6.2 um/min, profile angle $89.1^{\circ}$로 측정되었다. 또한 상부 에칭공정과 이면 에칭공정에서 폭과 wall의 간격이 동일하였으며, 완전히 관통된 양면식각이 이루어졌음을 확인하였다. 또한 실제 사용되는 probe unit의 조립에 적합한 slit 공정을 위한 에칭특성을 조사하였다.