• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.3
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• pp.419-427
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• 2016

This paper proposes a design method of LCL-filter for a grid-connected three-phase inverter using a discontinuous PWM (DPWM) method. When using a DPWM method, many harmonic voltages are generated in the inverter output compared to a continuous PWM (CPWM) method. Therefore, an optimized grid-connected filter design is required for a DPWM method. The proposed design method provides generalized formula to design accurate LCL-filter without trial and error procedures. An inverter side inductance is designed by analyzing the current ripple injected to the grid. The Optimized parameters of LCL-filter can be designed by analyzing the total harmonic distortion (THD) and the ripple attenuation factor of the output current. The proposed LCL filter design method is demonstrated by simulation and experimental results.

• Journal of international Conference on Electrical Machines and Systems
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• v.3 no.4
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• pp.433-445
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• 2014

Single phase voltage source converter (VSC) is an important power electronic converter (PEC), including single-phase voltage source inverter (VSI), single-phase voltage source rectifier (VSR), single-phase active power filter (APF) and single-phase grid-connection inverter (GCI). As the fundamental part of large scale PECs, single-phase VSC has a wide range of applications. In the paper, as first, on the basis of the concept of the discontinuous pulse-width modulation (DPWM) for three-phase VSC, a new DPWM of single-phase VSR is presented by means of zero-sequence component injection. Then, the transformation from stationary frame (abc) to rotating frame (dq) is designed after reconstructing the other orthogonal current by means of one order all-pass filter. Finally, the presented DPWM based single-phase VSR is established analyzed and simulated by means of MATLAB/SIMULINK. In addition, the DPWMs presented by D. Grahame Holmes and Thomas Lipo are discussed and simulated in brief. Obviously, the presented DPWM can also be used for single-phase VSI, GCI and APF. The simulation results show the validation of the above modulation algorithm, and the DPWM based single-phase VSR has reduced power loss and increased efficiency.

• Journal of Power Electronics
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• v.12 no.1
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• pp.98-103
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• 2012

This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.249-250
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• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1490-1499
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• 2017

The modular multilevel converter (MMC) is generally considered to be a promising topology for medium-voltage and high-voltage applications. However, in order to apply it to high-power applications, a huge number of switching devices is essential. The numerous switching devices lead to considerable switching losses, high cost and a larger heat sink for each of the switching device. In order to reduce the switching losses of a MMC, this paper analyzes the performance of the conventional discontinuous pulse-width modulation (DPWM) method and its efficiency. In addition, it proposes a modified novel DPWM method for advanced switching losses reduction. The novel DPWM scheme includes an additional rotation method for voltage-balancing and power distribution among sub modules (SMs). Simulation and experimental results verify the effectiveness and performance of the proposed modulation method in terms of its switching losses reduction capability.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.148-156
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• 2013

This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.

• Journal of the Korean Society for Railway
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• v.20 no.4
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• pp.448-457
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• 2017

In this paper, for high speed railway propulsion systems, a single phase PWM Converter using discontinuous PWM (DPWM) was investigated. The conventional PWM Converter uses a low frequency modulation index of less than 10 to reduce switching losses due to high power characteristics, which results in low control frequency bandwidth and requires an additional compensation method. To solve these problems, the DPWM method, which is commonly used in three phase PWM Inverters, was adopted to a single phase PWM Converter. The proposed method was easily implemented using offset voltage techniques. Method can improve the control performance by doubling the frequency modulation index for the same switching loss, and can also bring the same dynamic characteristics among switches. Proposed DPWM method was verified by simulation of 100 kW PWM converter.

• Journal of Power Electronics
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• v.17 no.3
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• pp.686-694
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• 2017

Due to the wide use of electronic products, digitally controlled DC-DC converters are attracting more and more attention in recent years. However, digital control strategies may introduce undesirable Limit Cycle Oscillation (LCO) due to quantization effects in the Analog-to-Digital Converter (ADC) and Digital Pulse Width Modulator (DPWM). This results in decreases in the quality of the output voltage and the efficiency of the system. Meanwhile, even if the resolution of the DPWM is finer than that of the ADC, LCO may still exist due to improper parameters of the digital compensator. In order to discover how LCO is generated, the state space averaging model is applied to derive equilibrium equations of a digital PID controlled DC-DC converter in this paper. Furthermore, the influences of the parameters of the digital PID compensator, and the resolutions of the ADC and DPWM on LCO are studied in detail. The amplitude together with the period of LCO as well as the corresponding PID parameters are obtained. Finally, MATLAB/Simulink simulations and FPGA verifications are carried out and no-LCO conditions are obtained.

• Proceedings of the KIPE Conference
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• 2013.11a
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• pp.107-108
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• 2013

본 논문에서는 3-레벨 NPC(Neutral Point Clamped) 인버터에서 사용되는 SVPWM(Space Vector Pluse Width Modulation)기법들 중 옵셋전압을 이용한 대칭 SVPWM과 효율을 높이기 위한 전압 지령 벡터를 계산한 $120^{\circ}$ DPWM(Discontinuous PWM)과 $60^{\circ}(+30^{\circ})$ DPWM을 비교 분석하였다. 각 SVPWM간의 효율 및 THD를 비교 분석 하였고 이를 통해 시뮬레이션으로 스위칭 방식에 따라 비교하여 효율 및 THD 결과를 도출하였다.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1325-1335
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• 2018

This paper presents a discontinuous pulse width modulation (DPWM) method to reduce switching losses in an indirect matrix converter (IMC) drive. The IMC has a number of power semiconductor switches. In other words, it consists of a rectifier stage and an inverter stage for AC/AC power conversion, which are composed of 12 and 6 switching devices, respectively. Therefore, the switching devices of the IMC suffer from high switching losses in the IMC drives. Various topologies to reduce switching losses have been studied by eliminating a number of switches from the rectifier stage. In this study, in contrast to prior research, a DPWM method is presented to reduce the switching losses of the inverter stage. The effectiveness of the proposed method to reduce switching losses in IMC drives is verified by simulations and experimental results.