• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.1-9
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• 2014

In this paper, a reconfigurable polarization patch antenna that uses a Y-shaped feed is proposed. The proposed antenna consists of a square patch, a Y-shaped feeding structure, a PIN diode, and a bias circuit for diode operation. The structural symmetry/asymmetry of the feeding structure is determined by the on/off operation of the PIN diode that inserted into the side of one of the lines of the Y-shaped feeding structure. For the proposed reconfigurable antenna, the two microstrip lines of the feeding structure have the same length when the PIN diode operates in the on state, and the antenna exhibits linear polarization(LP). On the other hand, when the PIN diode operates in the off state, the length of one side line of the feeding structure is relatively shorter than that of the other line. Therefore, the antenna exhibits circular polarization(CP). From the measurement results, it is found that the proposed antenna exhibits good impedance matching and axial ratio. In addition, polarization switching can be easily achieved in the same operating band.

• Korean Journal of Materials Research
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• v.33 no.11
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• pp.497-501
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• 2023

ZnO/Cu/ZnO (ZCZ) thin films were deposited at room temperature on a glass substrate using direct current (DC) and radio frequency (RF, 13.56 MHz) magnetron sputtering and then the effect of post-deposition electron irradiation on the structural, optical, electrical and transparent heater properties of the films were considered. ZCZ films that were electron beam irradiated at 500 eV showed an increase in the grain sizes of their ZnO(102) and (201) planes to 15.17 nm and 11.51 nm, respectively, from grain sizes of 13.50 nm and 10.60 nm observed in the as deposited films. In addition, the film's optical and electrical properties also depended on the electron irradiation energies. The highest opto-electrical performance was observed in films electron irradiated at 500 eV. In a heat radiation test, when a bias voltage of 18 V was applied to the film that had been electron irradiated at 500 eV, its steady state temperature was about 90.5 ℃. In a repetition test, it reached the steady state temperature within 60 s at all bias voltages.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.18-24
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• 2012

This paper reports the test results of a 50MHz/s 10 bits DAC developed with $0.18{\mu}m$ CMOS process for the wireless sensor network application. The 10bits DAC, not likely a typical segmented type, has been designed as a current driving type with double step thermometer decoding architecture in which 10bits are divided into 6bits of MSB and 4bits of LSB. MSB 6bits are converted into 3 bits row thermal codes and 3 bits column thermal codes to control high current cells, and LSB 4 bits are also converted into thermal codes to control the lower current cells. The high and the lower current cells use the same cell size while a bias circuit has been designed to make the amount of lower unit current become 1/16 of high unit current. All thermal codes are synchronized with output latches to prevent glitches on the output signals. The test results show that the DAC consumes 4.3mA DC current with 3.3V DC supply for 2.2Vpp output at 50MHz clock. The linearity characteristics of DAC are the maximum SFDR of 62.02dB, maximum DNL of 0.37 LSB, and maximum INL of 0.67 LSB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4B
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• pp.365-371
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• 2002

In this paper, the fabricated power PHEMT devices for millimeter-wave that is below a gate-length of 0.2 $\mu\textrm{m}$ using electronic beam lithography technologies, and the DC and frequency characteristics and an output power characteristics were Measured at the various bias conditions. The unit process that is used in PHEMT's manufacture used that low-resistance ohmic contact, air-bridge and back-side lapping process technologies, and so on. The fabricated power PHEMT have an S521 gain of 4 dB and a maximum transconductance(gm) of 317 mS/mm, an unilateral current gain(fT) of 62 GHz, a maximum oscillation frequency(fmax) of 120 GHz at 35 GHz, and a maximum power output(Pmax) of 16 dBm, a power gain(GP) of 4 dB and a drain efficiency(DE) of 35.5 %.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.243-243
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• 2012

화석연료를 대체할 새로운 청정 에너지원의 요구가 높아지고 있는 현 시점에서 고효율, 무공해, 무소음 등의 장점으로 인해 친환경적 에너지원으로 연료전지의 수요가 증가하고 있다. 연료전지 분리판으로 고밀도 흑연을 종래에 가공하여 제작하였는데, 가공이 어렵고, 비용이 크게 들며, 대량생산이 어렵다는 등의 문제로 스테인리스강을 위주로 한 금속 분리판 개발이 이루어지고 있다. 본 연구에서는, 낮은 가격, 고속 증착, 우수한 가공성, 높은 기계적 강도 및 전기전도도, 화학적 안정성 및 내식성을 충족시키기 위하여 스테인리스 강박(0.1 mm이하)에 보호막으로 CrN을 선택하였다. 저가격화를 위하여 새로운 증착원인 스퍼터-승화형 소스의 가능성을 유도 결합 플라즈마에 Cr 봉을 직류 바이어스 함으로써 시도하였다. 10 mTorr의 Ar 유도 결합 플라즈마를 2.4 MHz, 400 W로 유지하면서 직류 바이어스 전력을 120 W (615 V, 0.19 A) 인가하였을 때 10분 동안의 증발양이 0.35 gr으로 측정이 되어 그 가능성을 확인할 수 있었다. 또한 OES(Optical emission spectrometer)를 이용하여 RPS로 방전시킨 고밀도 ICP를 측정한 결과 842.4 nm, 811.4 nm, 772.3 nm 등의 파장에서 높은 intensity를 갖는 peak을 찾을 수 있었고, 이 peak 들은 Ar 중성의 peak임을 확인할 수 있었다. ICP+DC bias로 Cr rod를 가열하는 공정에서의 plasma를 OES로 측정한 결과 Ar 중성의 peak은 감소하고, 520.5 nm, 425.5 nm, 357.7 nm 등의 파장에서 높은 intensity를 갖는 peak을 찾을 수 있었으며, 이 peak들은 Cr 중성의 peak임을 확인할 수 있었다. OES 측정 data를 토대로 공정 중의 rod type Cr target의 교체 주기를 예측할 수 있고 공정 중 실시간 감시가 가능할 것으로 기대된다.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.2
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• pp.27-31
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• 2002

In this study, $CeO_2$ thin films were etched with an addition of $Cl_2$ gas to $Ar/CF_4$ gas mixing in an inductively coupled plasma (ICP) etcher by the etching parameter such as RF power of 700 W, chamber pressure of 15 mTorr and dc bias voltage of -200 volts. The etch rate of $CeO_2$ films was 250 $\AA$/min with an addition of 10% $Cl_2$ gas to $Ar/CF_4$ gas mixture and the selectivity to SBT film was 0.4 at that condition. The surface reactions of the etched $CeO_2$ thin films were investigated by X-ray photoelectron spectroscopy (XPS). It was analyzed that Ce peaks were mainly observed in Ce-O bonds formed $CeO_2$ or $Ce_2O_3$ compounds. Cl peaks were detected by the peaks of Cl $2p_{3/2}$ and Cl $2p_{1/2}$. Almost all of Cl atoms were combined with Ce atoms like $CeCl_x$ or $Ce_x/O_yCl_z$ compounds.

• Journal of the Korea Convergence Society
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• v.7 no.3
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• pp.77-85
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• 2016

We propose a digital signal processing technic that can compensate the non-linearity inherent in audio amplifiers, and present the result of the simulation. The inherent non-linearity of the audio power amplifier arising from analog devices is compensated via a digital signal processing technic consisting of indirect learning architecture and an adaptive filter. The simulation results show that the compensator can be realized using a third-order polynomial and compensates odd-order non-linearity efficiently. The even-oder non-linearity is mainly due to the dc offset at the output, which is difficult to eliminate with the proposed method. Care must be taken in designing the bias circuit to avoid the DC offset at the output. The proposed technic has significance in that digital signal processing technic can compensate for the impairment that is an inherent characteristic of an analog system.

• Korean Journal of Materials Research
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• v.3 no.4
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• pp.327-335
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• 1993

Using a RF cylindrical magnetron operated with two electromagnets having a Helmholz configuration, RF magnetron plasma properties and characteristics of reactive ion ething of Si were investigated as a function of applied magnetic field strengths using 3mTorr $CF_4/H_2$ and $CHF_3$. Also, I-V characteristics of Schottky diodes, which were made of silicons etched under different applied magnetic field strengths and gas environments, were measured to investigate the degree of radiation damage during the reactive ion etching. As the magnetic field strent;th increased, ion densities and radical densities of the plasmas were increased linearly, however, the dc self-bias voltages induced on the powered electrode, where the specimen are located, were decreased exponentially. Maximum etch rates, which were 5 times faster than that etched without applied magnetic filed, were obtained using near lOOGauss, and, under these conditions, little or no radiation damages on the etched silicons were found.

• Journal of Navigation and Port Research
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• v.27 no.5
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• pp.505-511
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• 2003

In this paper, a driving amplifier stage with 1 Watt output has been designed and fabricated, which is operating at UHF band( 470 ∼ 806 MHz) for digital TV repeater. In the driving amplifier stage, preamplifier and 1 Watt unit amplifier are integrated by one electric substrate which is 2.53 in dielectric constant and 0.8 mm thickness. When the driving amplifier stage is flown by bias voltage of 28 V DC and current of 900 mA. it has the gain of more than 53.5 dB. the gain flatness of $\pm$0.5 dB and return loss of less than -15 dB in 470 ∼ 806 MHz. Also, when two signals at 2 MHz frequency interval are input port into the driving amplifier stage with 1 Watt output, it resulted in excellent characteristics to designed specification with showing intermodulation distortion characteristics of more than 48 dBc.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.348-354
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• 2009

It has analyzed that the device degradation by NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOSFETs. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is govern by interface traps density at the silicon/oxide interface. from the relation between the variation of threshold voltage and subthreshold slope, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. Therefore, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress engineering of nanoscale CMOSFETs.