• 전력전자학회논문지
• /
• 제26권1호
• /
• pp.53-58
• /
• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• 한국정보통신학회논문지
• /
• 제14권8호
• /
• pp.1868-1876
• /
• 2010

본 논문에서는 logic 공정 기반의 소자만 사용한 256bit EEPROM IP를 설계하였다. 소자간의 전압을 신뢰성이 보장되는 5.5V 이내로 제한하기위해 EEPROM의 코어 회로인 CG (Control Gate)와 TG (Tunnel Gate) 구동 회로를 제안하였다. 그리고 DC-DC converter인 VPP (=+4.75V), VNN (-4.75V)과 VNNL (=VNN/3) generation 회로를 제안하였고 CG와 TG 구동 회로에 사용되는 switching power인 CG_HV, CG_LV, TG_HV, TG_LV, VNNL_CG와 VNNL_TG 스위칭 회로를 설계하였다. 일반적인 모의실험 조건에서 read, program, erase 모드의 전력 소모는 각각 $12.86{\mu}W$, $22.52{\mu}W$, $22.58{\mu}W$으로 저전력 소모를 갖는다. 그리고 테스트 칩을 측정한 결과 256bit이 정상적으로 동작을 하였으며, VPP, VNN, VNNL은 4.69V, -4.74V, -1.89V로 목표 전압 레벨이 나왔다.

• 전력전자학회논문지
• /
• 제4권2호
• /
• pp.175-183
• /
• 1999

PWM 컨버터에서 직류출력전압의 빠른 응답을 위해 입력 및 출력의 전력평형개념을 시스템 모델링에 도입하는 것이 바람직하다. 이 경우 시스템은 비선형이 되며 제어기 설계가 용이하지 않다. 본 논문에서는 입출력 궤환선형화 기법을 응용하여 시스템의 비선형성을 제거하였으며 그 결과 빠른 전압응답특성을 얻을 수 있었다. 또한 작은 용량의 전해커패시터를 사용하더라도 부하변동에 대해 직류출력전압을 일정하게 유지하는 것이 가능함을 보였다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1997년도 전력전자학술대회 논문집
• /
• pp.393-399
• /
• 1997

Single-phase and three-phase AC to DC power converters are becoming frequently used for high voltage/high power applications such as telecommunications. They often require input/output transformer isolation for safety, a unity input power factor for minimum reactive power, free input harmonic currents fed back to the AC Power distribution system and, finally, high efficiency and high power density for minimum weight and volume. The proposed boost converter for power factor correction (PFC) provides an unity input power factor, low harmonic distortion and high efficiency along with reduced volume and weight. Single-phase 220VAC input/380VDC 1KW output prototype is constructed and experimental results will be verified with those of PSpice simulation.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
• /
• pp.15-18
• /
• 2003

The electric power, regenerated while railway vehicles braking or running downhill, makes U line voltage rise and the feeding system may not be secure. In order to keep away from these kind of insecurity, the regenerative energy should be consumed by loads or transmitted to the AC side via certain devices such as DC/AC converters. This paper introduces the developed regenerative inverter for electric railway.

• 한국해양공학회지
• /
• 제8권1호
• /
• pp.50-61
• /
• 1994

A 300 meter class ROV(CROV300) is composed of three parts : a surface unit, a tether cable and an underwater vehicle. The vehicle controller is based on two processors : an Intel 8097-16-bit one chip micro-processor and a Texas Instruments TMS320E25 digital signal processor. In this paper, the surface controller, the vehicle controller and peripheral devices interfaced with the processors are described. These controllers transmit/receive measured status data and control commands through RS422 serial communication. Depth, heading, trimming, camera tilting, and leakage signals are acquired through the embedded AD converters of the 8097. On the other hand, altitude of ROV and lbstacle avoidance signals are processed by the DSP processor and periodically fetched by the 8097. The processor is interfaced with a 4-channel 12-bit D/A converter to generate control signals for DC motors an dseveral transistors to handle the relays for on/off switching of external devices.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1994년도 하계학술대회 논문집 A
• /
• pp.556-558
• /
• 1994

This paper proposes a new converter that can reduce the harmonics like conventional 12-pulse dual thyrister converters with the input transformers. Both the bridges are controlled with the shifted firing angle and connected through current sharing reactors. Using the center tapped reactor, the DC link current is controlled with the different two values in order to make the input current waveform 12 pulses.

• Journal of Electrical Engineering and Technology
• /
• 제6권2호
• /
• pp.245-254
• /
• 2011

This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

• 전력전자학회논문지
• /
• 제19권5호
• /
• pp.450-456
• /
• 2014

In HVDC converters that employ a line-commutated control, reactive power is absorbed by the rectifier and inverter terminals during AC/DC conversion. An AC filter usually consists of filters and large shunt capacitors to supply reactive power to the HVDC station. When STATCOM is used to supply reactive power to the HVDC system with AC filter, the low-order harmonics generated from STATCOM can result in a resonance between the shunt capacitor and AC network. Therefore, a control strategy based on selective harmonic elimination is adopted to minimize the low-order harmonics from STATCOM. The cancellation of harmonic instabilities is verified through simulations in PSCAD/EMTDC.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1992년도 하계학술대회 논문집 B
• /
• pp.985-987
• /
• 1992

The three-phase full(6-pulse) bridge controlled rectifier is one of the most widely used types of solid-state converters in DC drive applications for higher performance. In most of the previous designs gate control circuits of the converter have been designed with analog method, whitch can be easily affected by noise. In this study microprocessor and pheripal LSIs are used for eliminating these problems and successful results have been obtained.