• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3215-3217
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• 1999

In this paper, a new structure of realizing switching control logic for Data Weighted Average Technique is suggested. It uses memory and adder for summing past binary input and this summed data is used to select one switch in control logic. This control logic acts in parallel regardless of resolution so increasing resolution don't affect on converting speed. In this reason, high speed and high resolution D/A converter based on Data Weighted Average Technique could be made. In this paper, 4 bits current mode thermometer code D/A converter is degined and simulated by using HSPICE. Simulated results show that new structure of D/A converter has more than 250MHz converting speed and less than 0.0003[LSB] INL error. It is very useful in low power circuit because of using 3.3 V supply voltage.

• Journal of Power Electronics
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• v.9 no.4
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• pp.604-611
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• 2009

A dP/dV feedback-controlled MPPT (Maximum Power Point Tracking) method for photovoltaic power systems using II-SEPIC (Isolated Inverse-SEPIC; Single Ended Primary Inductance Converter) is presented and a current-mode dP/dV feedback-controlled MPPT method is devised to apply for the PV power converter system. A control strategy for the current-mode dP/dV feedback control system is developed in this paper and the proposed MPPT shows relatively satisfactory dynamics against rapidly changing insolation conditions. In order to verify the validity and effectiveness of the proposed method, simulations and experiments of the PV power system using II-SEPlC converter are performed. These simulation and experiment results show that the proposed method enables the PV power system to extract maximum power from the photovoltaic module against the solar insolation variation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.5
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• pp.1120-1128
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• 2004

In this paper, we has designed and implemented Up-converter for K-band with high IMD3 performance using balanced power amplifier. It is consisted of PA module and, Local Oscillator module with reject Filter, mixer module and If block, and Up-converter has a local loop path to decide whether it operate or not and has the sensing port to inspect output power level. According to the power budget of designed Up-converter, K-band balanced power amplifier was fabricated by commercial MMIC. Measurement results of up-converter show about 40dB Gain, PldB of 29dBm and OIP3 was 38.25dBm, that is good performance compared to power budgets. We has adjusted gate voltage of MMIC to control more than 30 dB gain. This up-converter was used in transceiver for PTP and PTMP, and applied to digital communication system that use QAM and QPSK modulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.349-356
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• 2014

As the turns ratio of the tapped-inductor contributes to the step-up ratio, the tapped-inductor boost (TIB) converter has significantly increased level of difficulties in its analysis and design compared to the conventional boost converter where the duty ratio is the sole factor affecting the step-up ratio. In this paper, the operation of the continuous current mode TIB converter is briefly reviewed, the characteristics are analyzed in detail, and a design guideline optimizing the loss in the tapped-inductor is presented with a practical design example. Finally, experimental results from a 12V/120V prototype for 0.25A LED driver application are also presented to confirm the design.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.2
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• pp.111-117
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• 2004

The low-power design of the A/D converter is indispensable to achieve the compact bio-signal measuring device with long battery duration. In this paper, new decimation filter structure is proposed for the low-power design of the Sigma-Delta A/D converter in the bio-instruments. The proposed filter is based on the non-recursive structure of the CIC (Cascaded Integrator Comb) decimation filter in the Sigma-Delta A/D converter. By combining the CSD (Canonic Signed Digit) structure with common sub-expression sharing technique, the proposed decimation filter structure can significantly reduce the number of adders for implementation. For the fixed decimation factor of 16, the 15％ of power consumption saving is achieved in the proposed structure in comparison with that of the conventional polyphase CIC filter.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.2
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• pp.256-261
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• 2011

In this paper, a design and an implementation of an Analog to Digital (A/D) converter are introduced for the conversion of monitored battery cell voltage in the cell voltage monitoring(CVM) system in battery management system(BMS), which is one of the key devices of ECO hybrid cars. The A/D converter in CVM system required a middle conversion speed and a high resolution, therefore, a successive approximate register(SAR) typed A/D converter with 10 bits resolution has been designed and implemented using Magna 0.6um 40V process. The measurement result which kept ${\pm}1$ LSB accuracy in the full scale range(FSR) of 5V, showed the usefulness of the SAR typed A/D converter in realizing a CVM system.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.4
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• pp.312-323
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• 2017

This paper introduces the bidirectional dc-dc converter design case study, which employs silicon-carbide (SiC) MOSFETs for battery energy storage system (BESS). This converter topology is selected as bidirectional synchronous buck converter, which is composed of a half bridge converter, an inductor, and a capacitor, where the converter has less conduction loss than that of a unidirectional buck and boost converter, and to improve the converter efficiency, both the power stage design and power conversion architecture are described in detail. The conduction and switching losses are compared among three different SiC devices in this paper. In addition, the thermal analysis using Maxwell software of each switching device supports the loss analyses, in which both the 2 kW prototype analyses and experimental results show very good agreement.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.51 no.12
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• pp.562-570
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• 2002

The Purpose of this paper is to design and manufacture an educational system in order to demonstrate the causes and effects of electromagnetic induction.'rho educational system described in this study is a "jumping ring apparatus". This system demonstrates the principle of electromagnetic induction, a force from AC sources, Lenz's law of repulsion and transformer. The educational system is composed of a jumping ring apparatus, a sensor array, encoder, A/D converter, D/A converter and nonlinear controller. The educational system is controlled by 586 PC using Turbo C program. The sensor array is composed of 20 optical sensors. The nonlinear controller consists of nonlinear control algorithm and control board included SCR, FET and phase controller. The A/D converter is used to show the height of ring position to analog for an education purpose. The control signal calculated from the nonlinear control of algorithm send control board through 8 bit D/A convertor. Experiment results are given to verify that Proposed nonlinear controller is useful in on line control of the educational system.al system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.12
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• pp.1435-1444
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• 2008

In this paper, we designed a reduced height waveguide(WG) to microstrip mode converter with a short transition length. The mode converter is composed of a mode converter using E-plane probe and a modified impedance transformer. The mode converter was designed using a probe shorted to top of a 50 ohm ridge WG. The modified impedance transformer was designed to connect the mode converter to the reduced height WG. For wide bandwidth operation, the coupling of the two parts was tuned. The structure of the mode converter was optimized for low loss and wide bandwidth, and the optimized mode converter was fabricated. The performance of the mode converter was extracted using the thru and line S-parameters for back-to-back connections, and the connector loss was calibrated. The mode converter has a right angle structure and short transition length, 7.2 mm. The mode converter shows excellent performances; the insertion loss of 0.12 dB at 15 GHz, and the return loss above 10 dB for the full Ku-band.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2A
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• pp.114-121
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• 2005

In this paper, Pipelined A/D converter with multi SHA structure is proposed for high speed operation. The proposed structure incorporates a multi SHA block that consists of multiple SHAs of identical characteristics in parallel to improve the conversion speed. The designed multi SHA is operated by non-overlapping clocks and the sampling speed can be improved by increasing the number of multiplexed SHAs. Pipelined A/D converter, applying the proposed structure, is designed to satisfy requirement of analog front-end of VDSL modem. The measured INL and DNL of designed A/D converter are $0.52LSB{\sim}-0.50LSB\;and\;0.80LSB{\sim}-0.76LSB$, respectively. It satisfies the design specifications for VDSL modems. The simulated SNR is about 66dB which corresponds to a 10.7 bit resolution. The power consumption is 24.32mW.