• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1241-1246
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• 2005

This paper described an 8bit, 100Msample/s CMOS D/A converter using a glich-time minimization technique for the high-speed sampling rate of 100MHz level. The proposed DAC was implemented in 0,35um Hynix CMOS technology and adopts a current mode architecture to optimize sampling rate, resolution, chip area. The DAC linear characteristics was similar to the proposed specification the prototype error between DNL and INL is less than ${\pm}0.09LSB$ respectively. Also, fab-out chip was tested, analysed the cause of error operation, and proposed the field considerations for chip test.

• 전자공학회논문지 IE
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• v.43 no.3
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• pp.6-12
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• 2006

This paper described an 8bit, 100Msample/s CMOS D/A converter using a glitch-time minimization technique for the high-speed sampling rate of 100MHz level. The proposed DAC was implemented in $0.35{\mu}m$ Hynix CMOS technology and adopts a current mode architecture to optimize sampling rate, resolution, chip area. The DAC linear characteristics was similar to the proposed specification and the prototype error between DNL and INL is less than $\pm$0.09LSB respectively. Also, the manufactured DAC chip was analyzed the cause of error operation and proposed the field considerations for chip test.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.343-346
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• 2002

In recent, complex SVPWM (Space Vector PWM) algorithm can be easily implemented by high performance microprocessor and DSP. Various SVPWM techniques are widely studied due to the advantages of low harmonic distortion and high use ratio of D.C. link voltage. Most of various studies for improving of VS-PWM inverter performance are concentrated about switching pattern and zero pulse pattern split algorithms. However, dc link voltage that is determined at rated load and speed conditions is not proper in the low speed and under rated load. In this paper, analysis of current ripple with digitally implemented SVPWM inverter is introduced according to link voltage. The optimal link voltage in the designed inverter system and load condition is provided in order to suppress output voltage error and current ripple. As remaining the effective voltage vector interval per sampling period sufficiently, additional voltage error and current ripple are suppressed. The proposed algorithm is verified through digital simulation and experimental results.

• Communications for Statistical Applications and Methods
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• v.20 no.4
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• pp.247-257
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• 2013

A variety of practical problems can be addressed in the framework of rotation (successive) sampling. The present work presents a sample rotation pattern where sampling units are drawn on two successive occasions. The problem of estimation of population variance on current (second) occasion in two - occasion successive (rotation) sampling has been considered. A class of estimators has been proposed for population variance that includes many estimators as a particular case. Asymptotic properties of the proposed class of estimators are discussed. The proposed class of estimators is compared with the sample variance estimator when there is no matching from the previous occasion. Optimum replacement policy is discussed. Results are supported with the empirical means of comparison.

• Communications for Statistical Applications and Methods
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• v.22 no.5
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• pp.445-462
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• 2015

This article deals with the problem of estimation of the population mean in presence of multi-auxiliary information in two occasion rotation sampling. A multivariate exponential ratio type estimator has been proposed to estimate population mean at current (second) occasion using information on p-additional auxiliary variates which are positively correlated to study variates. The theoretical properties of the proposed estimator are investigated along with the discussion of optimum replacement strategies. The worthiness of proposed estimator has been justified by comparing it to well-known recent estimators that exist in the literature of rotation sampling. Theoretical results are justified through empirical investigations and a detailed study has been done by taking different choices of the correlation coefficients. A simulation study has been conducted to show the practicability of the proposed estimator.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.244-246
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• 2001

In a full digital implementation of a current regulator, the voltage output is inevitably delayed due to arithmetic calculation and PWM. In case of the synchronous frame current regulator, the time delay is accompanied by the rotation of frame. In some applications in which the ratio of sampling frequency to output frequency is not high enough, such as high power drive or super high-speed drive, it is known that the effect of rotation of frame during the delay time causes phase and magnitude error in the voltage output. The error degrades the dynamic performance and can bring about the instability of current regulator at high speed. It is also intuitively known that advancing the phase of voltage output can mitigate the instability. In this paper, the instability problems are studied analytically and a compensation method for the error has been proposed. By means of computer simulation and complex root locus analysis, comparative study with conventional methods is carried out and the effectiveness of proposed method is verified.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.2
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• pp.183-190
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• 2007

In this paper, a robust controller for PWM converter is proposed. The proposde converter controller consists of a PI controller for DC output voltage and a current controller using error-space approach for maintaining the sinusoidal current waveform and unity power factor. Conventionally, the try and error method has been used to design the current controller considering the switching frequency of the devices and sampling frequency of the digital controller. But this proposed method is based on characteristic ratio assignment(CRA) method which has the advantage to design the optimal gain to meet the referenced response and overshoot within the limit range. First, the CRA based current controller algorithm is explained. Then the validity of proposed controller is verified through the PSiM simulation and experience results.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.124-126
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• 1989

Inverse kinematic problem is a crucial point for robot manipulator control. In this paper, to implement the Jacobian control technique we used the Hopfield(Tank)'s neural network. The states of neurons represent joint veocities, and the connection weights are determined from the current value of the Jacobian matrix. The network energy function is constructed so that its minimum corresponds to the minimum least square error. At each sampling time, connection weights and neuron states are updated according to current joint position. Inverse kinematic solution to the planar redundant manipulator is solved by computer simulation.

• Journal of the Optical Society of Korea
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• v.14 no.3
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• pp.240-244
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• 2010

In this work, we used PWM sampling for demodulation of a fiber-optic interferometric current transformer. The interference signal from a fiber-optic CT is sampled with PWM triggers that produce a 90-degree phase difference between two consecutively sampled signals. The current-induced phase is extracted by applying an arctangent demodulation and a phase unwrapping algorithm to the sampled signals. From experiments using the proposed demodulation, we obtained phase measurement accuracy and a linearity error, in AC current measurements, of ~2.35 mrad and 0.18%, respectively. The accuracy of the proposed method was compared with that of a lock-in amplifier demodulation, which showed only 0.36% difference. To compare the birefringence effects of different fiber-optic sensor coils, a flint glass fiber and a standard single-mode fiber were used under the same conditions. The flint glass fiber coil with a Faraday rotator mirror showed the best performance. Because of the simple hardware structure and signal processing, the proposed demodulation would be suitable for low-cost over-current monitoring in high voltage power systems.

• International Journal of Reliability and Applications
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• v.2 no.1
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• pp.37-48
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• 2001

This paper presents a new dynamic human reliability analysis method and its application for quantifying the human error probabilities in implementing management action. For comparisons of current HRA methods with the new method, the characteristics of THERP, HCR, and SLIM-MAUD, which are most frequency used method in PSAs, are discussed. The action associated with implementation of the cavity flooding during a station blackout sequence is considered for its application. This method is based on the concepts of the quantified correlation between the performance requirement and performance achievement. The MAAP 3.0B code and Latin Hypercube sampling technique are used to determine the uncertainty of the performance achievement parameter. Meanwhile, the value of the performance requirement parameter is obtained from interviews. Based on these stochastic obtained, human error probabilities are calculated with respect to the various means and variances of the things. It is shown that this method is very flexible in that it can be applied to any kind of the operator actions, including the actions associated with the implementation of accident management strategies.