• Journal of the Microelectronics and Packaging Society
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• v.21 no.1
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• pp.45-50
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• 2014

Effects of wet chemical treatment and thermal cycle conditions on the quantitative interfacial adhesion energy of $Cu/SiN_x$ thin film interfaces were evaluated by 4-point bending test method. The test samples were cleaned by chemical treatment after Cu chemical-mechanical polishing (CMP). The thermal cycle test between Cu and $SiN_x$ capping layer was experimented at the temperature, -45 to $175^{\circ}C$ for 250 cycles. The measured interfacial adhesion energy increased from 10.57 to $14.87J/m^2$ after surface chemical treatment. After 250 thermal cycles, the interfacial adhesion energy decreased to $5.64J/m^2$ and $7.34J/m^2$ for without chemical treatment and with chemical treatment, respectively. The delaminated interfaces were confirmed as $Cu/SiN_x$ interface by using the scanning electron microscope and energy dispersive spectroscopy. From X-ray photoelectron spectroscopy analysis results, the relative Cu oxide amounts between $SiN_x$ and Cu decreased by chemical treatment and increased after thermal cycle. The thermal stress due to the mismatch of thermal expansion coefficient during thermal cycle seemed to weaken the $Cu/SiN_x$ interface adhesion, which led to increased CuO amounts at Cu film surface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.112-112
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• 2008

박막형 태양전지에 관한 연구는 1954년 D.C. Reynolds 가 단결정 CdS 에서 광기전력을 발견하면서부터 시작되었다. 고효율 단결정 규소 태양전지가 간편하게 제작되고 박막형 태양전지의 수명문제가 대두되어 한때는 연구가 중단되어지기도 하였으나, 에너지 문제가 심각해지면서 값이 저렴하고 넓은 면적에 쉽게 실용화 할 수 있는 박막형 태양전지에 많은 관심을 가지게 되었다. 박막형 태양전지에 사용되는 CdS는 II-VI 족 화합물 반도체로서 에너지금지대폭이 2.42eV인 직접천이형 n-type 반도체로서 대부분의 태양광을 통과시킬 수 있으며 가시광선을 잘 투과시키고 낮은 비저항으로서 광흡수층인 CdTe/$CuInSe_2$ 등과 같이 태양전지의 광투과층(윈도레이어)으로 널리 사용되고 있다. 이러한 이종접합 박막형 태양전지의 효율을 높이기 위해선 윈도레이어 재료인 CdS 박막의 낮은 전기 비저항치와 높은 광 투과도 값이 요구되어지고 있다. CdS 박막의 제작방법으로는 spray pyrolysis법, 스크린프린팅, 소결법, puttering법, 전착법, CBD(chemical bath deposition)법 및 진공증착법 등의 여러 가지 방법들이 보고되었다. 이 중 sputtering의 경우, 다른 방법들에서는 얻기 어려운 매우 얇은 두께의 박막 증착이 가능하며, 균일성 또한 우수하다. 또한 대면적화가 용이하여 양산화 기술로는 다른 제조 방법들에 비해 많은 장점을 가지고 있다. 따라서 본 연구에서는 sputtering에 의해 증착한 CdS의 박막에 광투과도 등의 향상을 위하여 CMP( chemical mechanical polishing) 공정을 적용하여 표면 특성을 개선하고자 하였다. 그 기초적인 자료로서 CdS 박막의 CMP 공정 조건에 따른 연마율과 비균일도, 표면 특성 등을 ellipsometer, AFM(atomic force microscopy) 및 SEM(scanning electron microscope) 등을 활용 하여 분석하였다.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.39-45
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• 2012

Three-dimensional integrated circuit(3D IC) technology has become increasingly important due to the demand for high system performance and functionality. In this work, BOE and HF wet etching of Cu line surfaces after CMP were conducted for Cu-Cu pattern direct bonding. Step height of Cu and $SiO_2$ as well as Cu dishing after Cu CMP were analyzed by the 3D-Profiler. Step height increased and Cu dishing decreased with increasing BOE and HF wet etching times. XPS analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE and HF wet etching treatment. BOE treatment showed not only the effective $SiO_2$ etching but also reduced dishing and Cu surface oxide rather than HF treatment, which can be used as an meaningful process data for reliable Cu-Cu pattern bonding characteristics.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.9
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• pp.20-25
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• 1998

Cu removal rates for various SiO$_2$ trench pitch sizes and densities and AFM images of surface profiles after global planarization using Cu CMP technology are investigated. In the experimental results, Cu removal rates are increasing as the pattern densities and pattern pitches are getting high and low, respectively, and then decreasing after local planarization. The rms roughness after global planarization are about 120$\AA$. AFM images with a 50% pattern density for 1${\mu}{\textrm}{m}$ and 2${\mu}{\textrm}{m}$ pitches show that thicknesses of 120~330$\AA$ Cu interconnects have been peeled off and oxide erosion of Cu/Sio$_2$ sidewall is observed. However, AFM images with a 50% pattern density for 10${\mu}{\textrm}{m}$ and 15${\mu}{\textrm}{m}$ pitches show that 260~340$\AA$ thick Cu interconnects have been trenched at the boundaries of Cu/Sio$_2$ sidewall.

• Korean Journal of Materials Research
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• v.16 no.12
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• pp.731-738
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• 2006

It is seriously considered using Al CMP (chemical mechanical planarization) process for the next generation 45 nm Al wiring process. Al CMP is known that it has a possibility of reducing process time and steps comparing with conventional RIE (reactive ion etching) method. Also, it is more cost effective than Cu CMP and better electrical conductivity than W via process. In this study, we investigated 4 different kinds of slurries based on abrasives for reducing scratches which contributed to make defects in Al CMP. The abrasives used in this experiment were alumina, fumed silica, alkaline colloidal silica, and acidic colloidal silica. Al CMP process was conducted as functions of abrasive contents, $H_3PO_4$ contents and pressures to find out the optimized parameters and conditions. Al removal rates were slowed over 2 wt% of slurry contents in all types of slurries. The removal rates of alumina and fumed silica slurries were increased by phosphoric acid but acidic colloidal slurry was slightly increased at 2 vol% and soon decreased. The excessive addition of phosphoric acid affected the particle size distributions and increased scratches. Polishing pressure increased not only the removal rate but also the surface scratches. Acidic colloidal silica slurry showed the highest removal rate and the lowest roughness values among the 4 different slurry types.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.1
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• pp.39-46
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• 2021

The quantitative measurement of interfacial adhesion energy (Gc) of multilayer thin films for Cu interconnects was investigated using a double cantilever beam (DCB) and 4-point bending (4-PB) test. In the case of a sample with Ta diffusion barrier applied, all Gc values measured by the DCB and 4-PB tests were higher than 5 J/㎡, which is the minimum criterion for Cu/low-k integration without delamination. However, in the case of the Ta/Cu sample, measured Gc value of the DCB test was lower than 5 J/㎡. All Gc values measured by the 4-PB test were higher than those of the DCB test. Measured Gc values increase with increasing phase angle, that is, 4-PB test higher than DCB test due to increasing plastic energy dissipation and roughness-related shielding effects, which matches well interfacial fracture mechanics theory. As a result of the 4-PB test, Ta/Cu and Cu/Ta interfaces measured Gc values were higher than 5 J/㎡, suggesting that Ta is considered to be applicable as a diffusion barrier and a capping layer for Cu interconnects. The 4-PB test method is recommended for quantitative adhesion energy measurement of the Cu interconnect interface because the thermal stress due to the difference in coefficient of thermal expansion and the delamination due to chemical mechanical polishing have a large effect of the mixing mode including shear stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.540-540
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• 2008

본 논문에서는 KOH 전해액을 이용하여 Cu 막의 부동태층의 형성을 I-V를 통해 평가하였으며, 이를 토대로 최적화된 전압과 시간을 알 수 있었다. 또한, SEM, EDS, XRD를 통해 표면 품질 및 성분 분석을 비교 분석하였다.

• Transactions on Electrical and Electronic Materials
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• v.5 no.6
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• pp.233-236
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• 2004

Copper metallization has been used in high-speed logic ULSI devices instead of the conventional aluminum alloy metallization. One of the key issues in copper CMP is the development of slurries that can provide high removal rates. In this study, the effects of slurry chemicals and pH for slurry dispersion stability on Cu CMP process characteristics have been performed. The experiments of copper slurries containing each different alumina and colloidal silica particles were evaluated for their selectivity of copper to TaN and $SiO_{2}$ films. Furthermore, the stability of copper slurries and pH are important parameters in many industries due to problems that can arise as a result of particle settling. So, it was also observed about several variables with various pH.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.30-30
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• 1999

알루미늄에 비해 전기저항이 낮고 electromigration 및 stress-migration에 대한 저항서이 높은 구리는 차세대 반도체 소자의 배선금속 재료로 여겨지고 있다. 최근 Chemical Mechanical Polishing (CMP) 기술의 도래로 구리배선 공정의 채택이 더욱 앞당겨질 전망이다. 한편, 구리 MOCVD를 위해 다양한 전구체화합물이 합성되었고, 근래에는 Cu(I)(hfc)L (L은 Lewis base 형태의 ligand) 형태의 전구체를 이용한 많은 증착 연구를 통하여 순수하고 전기저항이 낮은 구리 박막의 증착이 보고되었다. 구리 MOCVD의 가장 큰 문제점은 증착속도가 150-$^{\circ}C$20$0^{\circ}C$에서 500$\AA$/min 이하로 낮고 또한 증착된 필름 표면이 매우 거칠다는 데 있다. 이러한 단점으로 인해 전기화학적 증착후 CMP를 적용하는 것이 더욱 경제적이라는 견해가 우세해 지고 있다. 본 강연에서는 박막의 증착 속도와 표면 거칠기를 동시에 향사시키기 위해 catalytic surfactant를 이용한 새로운 MOCVD 개념을 도입하고, 구리 MOCVD에서 단원자층으로 흡착된 요오드 원자가 그 역할을 수행할 수 있음을 보이겠다. 또 요오드원자가 표면반응을 어떻게 수정하여 활성화에너지를 낮추는가를 반응메카니즘으로 밝히고 표면 평탄화의 미시적 해석을 제공하고자 한다. Catalytic Surfactant의 개념은 다른 박막 재료의 MOCVD에도 적용될 수 있으며, 나아가 적절한 기판 표면처리를 통하여 epitaxy도 가능할 것으로 본다.

• Tribology and Lubricants
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• v.25 no.6
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• pp.404-408
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• 2009

In this paper, the relationship between the material removal rate and the interfacial mechanical properties at particle-surface contact situation, which can be seen in an abrasive machining process using micro/nano-sized particles, was discussed. Friction and stiffnesses were measured experimentally on an atomic force microscope (AFM) by using colloidal probes which have a silica colloid particle in place of tip to simulate a particle-flat surface contact in an abrasive machining process. From the experimental investigation and theoretical contact analysis, the interfacial contact properties such as lateral stiffness of contact, friction, the material removal rate were presented with respect to some of material surfaces and the relationship between the properties as well.