• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2333-2335
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• 2005

Various CMOS quadrature-voltage-controlled oscillators(QVCOs) are designed and fabricated for the comparison of the phase noise. The core VCO is composed of two Colpitts oscillators which are cross-coupled with PMOS pair. For the comparison of phase noise with the proposed scheme, the conventional LC VCO followed by the frequency-divide-by-two is designed. The simulation result demonstrate that the proposed scheme shows better phase noise performance by 6dB than that of a conventional scheme in which LC VCO is followed by the frequency-divide-by-two.

• Structural Engineering and Mechanics
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• v.83 no.6
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• pp.729-744
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• 2022

In this paper, an analytical formulation is proposed to predict the vertical vibration response due to the pedestrian walking on a footbridge considering the human-structure interaction, where the footbridge and pedestrian are represented by the Euler beam and linear oscillator model, respectively. The derived coupled equation of motion is a nonlinear fourth-order partial differential equation. An uncoupled solution strategy based on the combined weighted residual and perturbation method) is proposed to reduce the tedious computation, which allows the separate integration between the bridge and pedestrian subsystems. The theoretical study demonstrates that the pedestrian subsystem can be treated as a structural system with added mass, damping, and stiffness. The analysis procedure is then applied to a case study under the conditions of single pedestrian and multi pedestrians, and the results are validated and compared numerically. For convenient vibration design of a footbridge, the simplified peak acceleration formula and the idea of decoupling problem are thus proposed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.1-8
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• 2005

An area-efficient DC-DC voltage up-converter in a poly-Si TFT technology for system-on-glass is described which provides low-ripple output. The voltage up-converter is composed of charge-pumping circuit, comparator with threshold voltage mismatch compensation, oscillator, buffer, and delay circuit for multi-phase clock generation. The low ripple output is obtained by multi-phase clocking without increasing neither clock frequency nor filtering capacitor The measurement results have shown that the ripple on the output voltage with 4-phase clocking is 123mV, while Dickson and conventional cross-coupled charge pump has 590mV and 215mV voltage ripple, respectively, for $Rout=100k\Omega$, Cout-100pF, and fclk=1MHz. The filtering capacitor required for 50mV ripple voltage is 1029pF and 575pF for Dickson and conventional cross-coupled structure, for Iout=100uA, and fclk=1MHz, while the proposed multi-phase clocking DC-DC converter with 4-phase and 6-phase clocking requires only 290pF and 157pF, respectively. The efficiency of conventional and the multi-phase clocking DC-DC converter with 4-phase clocking is $65.7\%\;and\;65.3\%$, respectively, while Dickson charge pump has $59\%$ efficiency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.60-68
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• 2007

A technique is presented to extract differential second harmonic output from common source nodes of a cross-coupled P-& N-FET oscillator. Provided the impedances at the common source nodes are optimized and the fundamental swing at the VCO core stays in a proper mode, it is found that the amplitude and phase errors can be kept within $0{\sim}1.6dB$ and $+2.2^{\circ}{\sim}-5.6^{\circ}$, respectively, over all process/temperature/voltage corners. Moreover, an impedance-tuning circuit is proposed to compensate any unexpectedly high errors on the differential signal output. A Prototype 5-GHz VCO with a 2.5-Hz LC resonator is implemented in $0.18-{\mu}m$ CMOS. The error signal between the differential outputs has been measured to be as low as -70 dBm with the aid of the tuning circuit. It implies the push-push outputs are satisfactorily differential with the amplitude and phase errors well less than 0.34 dB and $1^{\circ}$, respectively.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.3 no.1 s.4
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• pp.13-19
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• 2004

The VCO(Voltage Controlled Oscillator) with low phase noise and high reliability is implemented using nonlinear design, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise, and the qualify factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCO. The developed VCO has the oscillating tuning factor of 0.56MHz/V for the control voltage range of 0$\~$12V This VCO requires the DC power of 160mW. The phase noise characteristics exhibit good performances of -96.51dBc/Hz @ 10KHz and -116.3dBc/Hz @ 100KHz, respectively. And, the output power of 7.33 dBm is measured.

• Journal of the Korean earth science society
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• v.28 no.3
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• pp.343-356
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• 2007

This paper explored the characteristics of the interannual sea surface temperature (SST) variability in the equatorial Pacific by analyzing the simulated data from a newly coupled general circulation model (CGCM). The CGCM simulates well the realistic ENSO variability as well as the mean climatologies including SST, seasonal cycle, precipitation, and subsurface structures. It is argued that the zonal gradient of SST in the equatorial Pacific is responsible for the over-energetic SST variability near the equatorial western boundary in the model. This variability could also be related to the strong westward propagation of SST anomalies which resulted from the enhanced the zonal advection feedback. The simple two-strip model supports this by sensitivity tests. Analysis of the relationship between zonal mean thermocline depth and NINO3 SST index suggested that the ENSO variability is controlled by the recharge-discharge oscillator of the model. The lead-lag regression result reveals that heat buildup process in the western equatorial Pacific associated with the increase of the barrier layer thickness (BLT) is a precedent condition for El $Ni\widetilde{n}o$ to develop.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.408-414
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• 2005

The VCDRO(Voltage Controlled Dielectric Resonate. Oscillator) with low phase noise is designed using nonlinear analysis, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise performance, and the quality factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCDRO and the reliability analysis is accomplished to estimate the probability of operation at the end of life. The developed VCDRO has the oscillating tuning factor of 0.56MHZ1V for the control voltage range of 0-l2V. This VCDRO requires the DC power of 136mW. The phase noise characteristics exhibit good performances of -94.18dBc/Hz (a)10KHz and -116.3dBc/Hz (a)100KHz. And, the output power over 7.33dBm is measured.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.4 no.2 s.7
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• pp.81-87
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• 2005

In this paper, a VCDRO(Voltage Control Dielectirc Resonator Oscillator) for signal source of doppler radar system is designed and fabricated. The proposed VCDRO is made with new tuning mechanism using CPW line. The coplanar waveguide of $\lambda_{g}$/2 in length with varactor diode is placed on the metallization side under the dielectric resonator and coupled to it. Tuning varactor diode is mounted at one end of the CPW. The proposed circuit tuned by a CPW allows one more varactor diode to be mounted on the optimized CPW, where a greater sensitivity of frequency tuning is needed. With varying the biasing voltage for the varactor diode from 0 V to 15 V, output frequency tuning of 12 MHz is obtained. The PLDRO exhibits output power of 16.5 dBm with phase noise in the phase locked state characteristic of -115 dBc/Hz at 100 Hz, -105 dBc/Hz at the 10 kHz, and -102 dBc/Hz at 1 Hz offset from 10.525 GHz , respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.13-21
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• 2010

A energy efficient $V_{pp}$ generator using a variable pumping frequency for mobile DRAM is presented in this paper. The proposed $V_{pp}$ generator exploits 3 stages of a cross-coupled charge pump for energy efficiency. Instead of using a fixed pumping frequency in the conventional $V_{pp}$ generator, our proposed $V_{pp}$ generator adopts a voltage-controlled oscillator and uses variable frequencies to reduce the ramp-up time. As a result, our $V_{pp}$ generator generates 3.0 V output voltage with 24.0-${\mu}s$ ramp-up time at 2 mA current load and 1 nF capacitor load with 1.2 V supply voltage. Experimental results show that the proposed $V_{pp}$ generator consumes around 26% less energy (1573 nJ $\rightarrow$ 1162 nJ) and reduces 29% less ramp-up time (33.7-${\mu}s$ $\rightarrow$ 24.0-${\mu}s$) compared to the conventional approach.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.1
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• pp.13-21
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• 1997

In this paper, the oscillator type active antenna used as an element of active phased array antenna is designed and fabricated using slot coupling. The radiating element and active circuit are fabricated on each layer respectively and coupled electromagnetically through slot on the ground plane. This structure can solve the problems such as narrow bandwidth of microstrip antenna, spurious radiation by active circuits, and spaces for integration of the feeding circuits which are caused by integrating antennas with oscillator circuits in the same layer. The active antenna in this paper, the oscillation frequency can be tuned linearly by controlling the drain bias voltage of FET. The frequency tuning range is between 12.37 GHz to 12.65 GHz when bias voltage is varied from 3V to 9V, thus frequency tuning bandwidth is 280 MHz (2.24%). The output power of antenna is uniform within 5dB over frequency tuning range. Therefore this active antenna can be used as an element of linear or planar active phased array antennas.