• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.4
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• pp.52-62
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• 1996

In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analog current-mode active filters was proposed. Compared to the current-mode integrator which was proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter was designed with the proposed current-mode integrator. The designed circuits were fabricated using the ORBIT's 1.2.mu.m double-poly double-metal CMOS n-well process. The experimental resutls of the active filter designed and fabricated for this research have shown that it has the performance of 44.5MHz cutoff frequency, 3.3mW power dissipation and the third-order active filter area was 0.12mm$^{2}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.2
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• pp.184-191
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• 1993

Continuous-time integrated filters, implemented in MOS VLSI technology, have been receiving considerable attention. In this paper, a continuous-time fifth order elliptic low-pass MOSFET-C filter has been designed with a cutoff frequency 3,400Hz. First an active RC filter is designed using cascade method which each block can be tunable. And then the resistors of an active RC network are replaced by a linear resistor using NMOS depletion transistors operated in the triode region. This continuous-time MOSFET filter have simpler structure than switched-capacitor filter, so reduce the chip area. The designed MOSFET-C filter characteristics are simulated by PSPICE program.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.12
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• pp.1572-1580
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• 1995

In this paper, a modified Chebyshev low-pass filter function is proposed. The modified Chebyshev filter function exhibits ripples diminishing toward .omega. = 0 in the passband. So, the modified filter function is realizable in the passive doubly-terminated ladder network for the order n even or odd, thus lending itself amenable to active RC or switched capacitor filters through the simulation techniques. Besides the passive doubly-terminated ladder realizability, lower pole-Q values of the modified function are accountable for improved phase and delay characteristics, as compared to classical function. We have designed the 6th order passive doubly-terminated network using the modified function. And then a continuous-time DDA(Differential Difference Amplifier) filter, which has no matching requirement, is realized by leap-frog simulation technique for fabrication. In the HSPICE simulation results, we confirmed that the designed continuous-time DDA filter characteristics are agreement with the passive filter.

• Journal of Korea Multimedia Society
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• v.7 no.11
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• pp.1515-1520
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• 2004

In this paper, a new continuous-time bandpass active filter for lour-voltage applications is proposed. The active filter is composed of the CMOS complementary cascode circuit which can increase trans-conductance of an active element. These results are verified through the 0.25$\mu\textrm{m}$ CMOS n-well parameter hspice simulation. As a result, the gain and the unity gain frequency is 42dB and 200MHz respectively in the integrator. Additionally, center frequency of the bandpass active filter is 747kHz. And also bandwidth of the filter is 649kHz on 2V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.4
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• pp.685-695
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• 1997

In this paper, a new CMOS continuous-time fully-differential current-mode integrator is proposed as a basic building block of the low-voltage high frequency current-mode active filter. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined by a small-signal transconductance and a MOSFET gate capacitance can be expanded by the complementary transconductance of the proposed integrator. And also the magnitude of pole and zero are increased. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time fully-differential integrator with NMOS-gm. These results are verified by the small signal analysis and the SPICE simulation. As an application circuit of the proposed fully-differential current-mode integrator, the three-pole Chebyshev lowpass filter is designed using 0.8.$\mu$m CMOS processing parameters. SPICE simulation predicts a 3-dB bandwidth of 148MHz and power dissipation of 4.3mW/pole for the three-pole filter with 3-V power supply.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1587-1597
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• 2016

A novel active damping strategy for the LCL filter resonance is proposed using the grid current and the capacitor voltage. The proposed technique is deduced in the continuous time domain and a discussion for its discrete implementation is presented. According to the proposed technique, instability of the open loop system, which results in non-minimum phase behavior, can be avoided over wide range of resonant frequencies. Moreover, straightforward co-design steps for both the fundamental current regulator and the active damping loops can be used. A numerical example along with experimental results are introduced to validate the proposed strategy performance over wide range of resonant frequencies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.8
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• pp.65-73
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• 2007

This paper presents a low power CMOS continuous-time $\Sigma\Delta$ (sigma-delta) modulator for UMTS receivers. The loop filter of the continuous-time $\Sigma\Delta$ modulator consists of an active-RC filter which performs high linearity characteristics and has a simple tuning circuit for low power operating system The architecture of this modulator is the $3^{rd}-order$ 4-bit single loop configuration with a 24 of OSR (Oversampling Ratio) to increase the power efficiency. The modulator includes a half delay feedback path to compensate the excess loop delay. The experimental results of the modulator are 71dB, 65dB and 74dB of the peak SNR, peak SMR and dynamic range, respectively. The continuous-time $\Sigma\Delta$ modulator is fabricated in a 0.18-um 1P4M CMOS standard process and dissipates 15mW for a single supply voltage of 1.8V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.781-786
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• 1994

In this paper, we have proposed the AAF and the SMF design method that consist of continuous time active RC filter to prevent aliasing distortion by the limitation of SCF input signal, and to smooth the output signal wave of it. The designed AAF and SMF using continuous active RC filter are fabricated by ORBIT 2 m CMOS n-well process. And then the experiment characteristics of the integrated AAF and SMF are compared with SPICE simulation results.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.6
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• pp.109-114
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• 2013

The biological active points (BAP) are known as low resistance spots or good electro-permeable points. In this paper, a new method for BAP detection using the bio-impedance measurement system based on the adaptive frequency tracking filter (AFTF) and the transition event detector is presented. Also, the microcontroller process continuous time demodulation of the modulated signal by multi frequency components using the AFTF. The transition event detector based on the phase space method is applied about each frequency using the BAP equivalent model which is proposed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1579-1589
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• 1997

This paper introduces a monolithic chip 3.3V high-performance continuous-tune filter used in a CDP that can reconstruct the PDM or PWM signal output of a .SIGMA..DELTA. D/A converter. We also mentioned an active RC filter structure and filter order satisfying high-linearity and the design specification. In desigining the OP-AMP, using a structure that accepts some distortion we could reduce the chip area, and reducing the DC path using a new biascircuit gave us better power performance. The designed.SIGMA..DELTA. D/A converter post-processing filter does its smoothering operations and reconstructs the data without reducing the performance of the system.