• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.3
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• pp.223-228
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• 2010

In this paper, temperature compensation circuit for the X-band voltage controlled oscillator(VCO) is presented by using the temperature sensor with the OP-AMP circuit. The frequency drifting by the temperature could be compensated by applying the tuning voltage which include the linearly changing output voltage of the temperature sensor. As a result, the frequency variation is reduced to 6.6~4.4 MHzfrom the 71~73 MHz variation with the compensation circuit over -30~+$60^{\circ}C$ range, when VCO is operated in the frequency range of 9.95~10.05 GHz.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.54 no.9
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• pp.434-440
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• 2005

This paper describes an optimized Scheme of reactive-power compensation for the low short-circuit-ratio AC system interconnected with the HVDC system. An HVDC system interconnected with tile low SCR AC system is vulnerable to the ac voltage variation, which brings about the commutation failure of the converter. This problem can be solved using optimized compensation of reactive power. In this study, a benchmark system for HVDC system interconnected with low SCR AC system is derived using PSS/E simulation. Then an optimized srheme for reactive power compensation was derived using integer programming. The feasibility of proposed scheme was analyzed through silnulations with PSS/E and PSCAD/EMTDC. The proposed scheme can compensate the reactive power accurately and minimize the number of switching for harmonic filters and shunt reactors.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.241-246
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9 V power supply voltage. The simulation results show that the proposed PLL achieves 88% jitter reduction at 440 MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of 40 $M{\sim}725$ MHz with a multiplication range of 1-1023, and the RMS and peak-to-peak jitter are 5psec and 42.7 psec, respectively.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.98-106
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• 1994

To realize high accuracy and high speed we developed a new self compensation scheme and applied it to a 10-bit D/A converter. This circuit can compensate the device mismatch without interrupting the D/A converter operation. With the compensation circuit,INA decreased down to 0.22LSB from 0.47LSB. The device was fabricated using a 0.8$\mu$m CMOS process. The area of the D/A converter core is 3.2mm$^{2}$ and the area of the compensation part is 0.64mm$^{2}$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.995-998
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• 2005

This paper proposes a new SoC (System-on-Chip)-based automatic compensation circuit (ACC) for 5GHz low noise amplifier (LNA). This circuit is extremely useful for today's RF IC (Radio Frequency Integrated Circuit) devices in a complete RF transceiver environment. The circuit contains RF BIST (Built-ln Self-Test) circuit, Capacitor Mirror Banks (CMB) and digital processing unit (DPU). The ACC automatically adjusts performance of 5GHz LNA by the processor in the SoC transceiver when the LNA goes out of the normal range of operation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.42-50
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• 2003

This paper presents an embedded RC oscillator which has temperature compensation circuits. The conventional RC oscillator has frequency deviation about 15%, which is caused by variation of resistors and the reference voltage of schmitt trigger from the temperature condition. In this paper, the proposed circuit use a CMOS bandgap reference having balanced current temperature coefficients as a triggering voltage of schmitt trigger. The constant current sources consist of current mirror circuit with the positive and negative temperature coefficient. The proposed circuit shows less 3% frequency deviation for variation of temperature, supply voltage and process parameters.

• Journal of Sensor Science and Technology
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• v.18 no.4
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• pp.280-285
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• 2009

In this paper, we designed a 2-stage CMOS operational amplifier with temperature compensation function using 2-poly 4-metal 0.35 $\mu$m standard CMOS technology. Using two bias circuits, the positive temperature coefficient(PTC) and the negative temperature coefficient(NTC) of the bias circuit are canceled out each other. When reference current circuit is simulated that it has a temperature coefficient of -150 ppm/$^{\circ}C$ with a temperature change from 0 $^{\circ}C$ to 120 $^{\circ}C$. Also the proposed circuit has a temperature coefficient of -0.011 dB/$^{\circ}C$ of DC open loop gain with the same temperature range.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.594-600
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• 2014

A threshold voltage compensation pixel circuit was developed for active-matrix organic light emitting diodes (AMOLEDs) using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO-TFTs). Oxide TFTs are n-channel TFTs; therefore, we developed a circuit for the n-channel TFT characteristics. The proposed pixel circuit was verified and proved by circuit analysis and circuit simulations. The proposed circuit was able to compensate for the threshold voltage variations of the drive TFT in AMOLEDs. The error rate of the OLED current for a threshold voltage change of 3 V was as low as 1.5%.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.321-322
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• 2015

The aim of this paper is to propose a design method for the double-sided LCC compensation circuit for 6.6kW electric vehicle (EVs) wireless charger. The analysis and comparison with several compensation topologies such as SS, SP, PS, PP and the hybrid LCC compensation is presented. It has been found that the hybrid LCC compensation has superior performance in comparison with other topologies. The design procedure for the EV charger is presented and the PSIM simulation results are provided.

• ETRI Journal
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• v.29 no.3
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• pp.371-380
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• 2007

This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.