• 한국전자파학회논문지
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• 제21권3호
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• pp.223-228
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• 2010

본 논문에서는 온도 센서와 OP-AMP를 이용하여 X-밴드용 전압제어 발진기를 위한 온도 보상 회로를 구현하였다. 온도 변화에 대해 선형적인 특성을 갖는 온도 센서의 출력 전압을 튜닝 전압에 더해서 전압제어 발진기에 인가함으로써 온도에 따른 주파수 이동을 보상할 수 있었다. -30~+$60^{\circ}C$의 온도 범위에서 9.95~10.05 GHz의 대역에 대해 온도 보상을 한 결과, 전체 대역폭에서 출력 주파수는 온도 보상 전 71~73 MHz가 변화했으나, 온도보상 후에는 6.6~4.4 MHz의 변화를 보였다.

• 대한전기학회논문지:전력기술부문A
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• 제54권9호
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• pp.434-440
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• 2005

This paper describes an optimized Scheme of reactive-power compensation for the low short-circuit-ratio AC system interconnected with the HVDC system. An HVDC system interconnected with tile low SCR AC system is vulnerable to the ac voltage variation, which brings about the commutation failure of the converter. This problem can be solved using optimized compensation of reactive power. In this study, a benchmark system for HVDC system interconnected with low SCR AC system is derived using PSS/E simulation. Then an optimized srheme for reactive power compensation was derived using integer programming. The feasibility of proposed scheme was analyzed through silnulations with PSS/E and PSCAD/EMTDC. The proposed scheme can compensate the reactive power accurately and minimize the number of switching for harmonic filters and shunt reactors.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.241-246
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9 V power supply voltage. The simulation results show that the proposed PLL achieves 88% jitter reduction at 440 MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of 40 $M{\sim}725$ MHz with a multiplication range of 1-1023, and the RMS and peak-to-peak jitter are 5psec and 42.7 psec, respectively.

• 전자공학회논문지A
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• 제31A권6호
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• pp.98-106
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• 1994

To realize high accuracy and high speed we developed a new self compensation scheme and applied it to a 10-bit D/A converter. This circuit can compensate the device mismatch without interrupting the D/A converter operation. With the compensation circuit,INA decreased down to 0.22LSB from 0.47LSB. The device was fabricated using a 0.8$\mu$m CMOS process. The area of the D/A converter core is 3.2mm$^{2}$ and the area of the compensation part is 0.64mm$^{2}$.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 춘계종합학술대회
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• pp.995-998
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• 2005

본 논문에서는 시스템 온 칩 (SoC, System-on-Chip) 트랜시버에 적용이 가능하며. 저잡음 증폭기(LNA, Low Noise Amplifier)를 위한 자동 보상 회로 (ACC, automatic compensation circuit)를 제안한다. 개발된 회로는 고주파 내부 자체 검사 (BIST, Built-In Self-Test) 회로, 커패시터 미러 뱅크 (CMB, Capacitor Mirror Banks)와 디지털 처리장치로 구성되어 있다. 자동 보상 회로는 LNA가 정상 동작을 하지 않을 때 SoC 트랜시버의 구성요소인 디지털 프로세서를 이용하여 LNA가 정상 동작을 하도록 자동적으로 조정하는 역할을 한다.

• 대한전자공학회논문지SD
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• 제40권4호
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• pp.42-50
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• 2003

본 논문에서는 시스템의 클럭을 안정적으로 공급하는 집적화 한 내장형 RC oscillator의 구현에 관한 논문이다. 기존의 RC oscillator는 온도에 따라 주파수변화가 약 15%정도 변화가 있는데 이는 온도에 따른 저항값의 변화와 schmit trigger의 기준전압이 온도에 따라 변화하기 때문이다. 본 연구에서는 온도에 따른 주파수 변화를 최소화하는 방법으로 CMOS bandgap과 온도에 따른 전류의 변화를 이용하였다. CMOS bandgap으로 기준 전압을 얻고 온도에 따라 증가하는 전류원과 온도에 따라 감소 하는 전류원을 서로 합하면 온도에 따라 일정한 전류를 얻어 주파수의 변화를 약 3%이내로 유지하는 회로를 제안한다.

• 센서학회지
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• 제18권4호
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• pp.280-285
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• 2009

In this paper, we designed a 2-stage CMOS operational amplifier with temperature compensation function using 2-poly 4-metal 0.35 $\mu$m standard CMOS technology. Using two bias circuits, the positive temperature coefficient(PTC) and the negative temperature coefficient(NTC) of the bias circuit are canceled out each other. When reference current circuit is simulated that it has a temperature coefficient of -150 ppm/$^{\circ}C$ with a temperature change from 0 $^{\circ}C$ to 120 $^{\circ}C$. Also the proposed circuit has a temperature coefficient of -0.011 dB/$^{\circ}C$ of DC open loop gain with the same temperature range.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.594-600
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• 2014

A threshold voltage compensation pixel circuit was developed for active-matrix organic light emitting diodes (AMOLEDs) using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO-TFTs). Oxide TFTs are n-channel TFTs; therefore, we developed a circuit for the n-channel TFT characteristics. The proposed pixel circuit was verified and proved by circuit analysis and circuit simulations. The proposed circuit was able to compensate for the threshold voltage variations of the drive TFT in AMOLEDs. The error rate of the OLED current for a threshold voltage change of 3 V was as low as 1.5%.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.321-322
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• 2015

The aim of this paper is to propose a design method for the double-sided LCC compensation circuit for 6.6kW electric vehicle (EVs) wireless charger. The analysis and comparison with several compensation topologies such as SS, SP, PS, PP and the hybrid LCC compensation is presented. It has been found that the hybrid LCC compensation has superior performance in comparison with other topologies. The design procedure for the EV charger is presented and the PSIM simulation results are provided.

• ETRI Journal
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• 제29권3호
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• pp.371-380
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• 2007

This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.