• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2008.10a
• /
• pp.281-284
• /
• 2008

This paper describes ASIC design of multimedia SoC Platform. The implemented Platform consists of 32-bit OpenRISC1200 Microprocessor, WISHBONE on-chip bus, VGA Controller, Debug Interface, SRAM Interface and UART. The 32-bit OpenRISC1200 processor has 5 stage pipeline and Harvard architecture with separated instruction/data bus. The VGA Controller can display RCB data on a CRT or LCD monitor. The Debug Interface supports a debugging function for the Platform. The SRAM Interface supports 18-bit address bus and 32-bit data bus. The UART provides RS232 protocol, which supports serial communication function. The Platform is design and verified on a Xilinx VERTEX-4 XC4VLX80 FPGA board. Test code is generated by a cross compiler' and JTAG utility software and gdb are used to download the test code to the FPGA board through parallel cable. Finally, the Platform is implemented into a single ASIC chip using Chatered 0.18um process and it can operate at 100MHz clock frequency.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.51 no.7
• /
• pp.103-110
• /
• 2014

Recent TSV based 3D Integrated Circuit (IC) technology needs more powerful thermal management techniques. However, because cooling cost and form factor are restricted, thermal management are emphasis on software based techniques. But in case of throttling thermal management which one of the most candidate technique, increasing bus occupation induce total performance decrease. To solve communication bottleneck issue in TSV based 3D SoC, we proposed adaptive throttling technique Experimental results show that the proposed method can improve throughput by about 72% compare with minimal path routing.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.21 no.6
• /
• pp.43-48
• /
• 2021

We propose 2-channel filter bank method instead of FFT method to decrease sub-channel interference for using of efficient frequency resource in MC-CDMA method. Since a prototype filter of filter bank having wavelet characteristic is designed having more less side-lobe, the nearest co-channel interference and inter symbol interference are decreased efficiently. Since the spreading signal of suggesting MC-CDMA system is being demanded for less chip rate and is not being considering for autocorrelation characteristic, the Walsh code can be used as a optimal orthogonal signal set. We consider bit error rate and signal to noise ratio to estimate the performance of suggested system on condition that white noise channel and arbitrary sinusoidal jammer are existing. As a result of comparing to traditional FFT-based MC-CDMA simulation result, our suggested system has shown better performance than traditional MC-CDMA method on the side of minimizing interference effect.

• Korean Journal of Optics and Photonics
• /
• v.32 no.5
• /
• pp.230-234
• /
• 2021

Relief of thermal stress has received great attention, to improve the beam quality and stability of high-power laser diodes. In this paper, we investigate a microtrench structure engraved around a laser-diode chip-on-submount (CoS) to relieve the thermal stress on a laser-diode bar (LD-bar), using the SolidWorks® software. First, we systematically analyze the thermal stress on the LD-bar CoS with a metal heat-sink holder, and then derive an optimal design for thermal stress relief according to the change in microtrench depth. The thermal stress of the front part of the LD-bar CoS, which is the main cause of the "smile effect", is reduced to about 1/5 of that without the microtrench structure, while maintaining the thermal resistance.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.24 no.4
• /
• pp.121-127
• /
• 2024

In this paper, FEM (Front-End Module) MMIC, a key component for the application of the satellite communication terminal transmission and reception module of the multi-phase array structure, was designed and verified as a single chip by designing the Power Amplifier (PA) and the Low Noise Amplifier (LNA). It was manufactured using the GaAs PP10 (100nm) process, a compound semiconductor process from Win-semiconductors, and the operating frequency band of 7.2-10.5GHz operation, output 1W, and noise index of 1.5dB or less were secured using a dedicated test board. The developed FEM MMIC can be used as a single chip, and the components PA and LNA can also be used as each device. The developed device will be used in various applications of Minsu/Gunsu using the X band and the localization of overseas parts.

• Transactions on Electrical and Electronic Materials
• /
• v.11 no.5
• /
• pp.238-241
• /
• 2010

The purpose of this study is to solve the problems of radio frequency bandwidth frequency depletion, confusion possibilities, and security that are in current wireless communications systems, and to confirm the possibility of applying those solutions for the next generation network. To solve the problems of the current wireless communications system, a visible light communications system for power line communication (PLC) via 8-bit microcontroller is created and the capacity is analyzed. The exclusive PLC chip APLC-485MA, an 8-bit ATmega16 microcontroller, high brightness 5pi light emitting diodes (LEDs), and the LLS08-A1 visible light-receiving sensor were used for the transmitter and receiver. The performance was analyzed using a designed program and an oscilloscope. The voltage change was measured as a function of distance from 10-50 cm. Blue LEDs showed the best performance among the measured LED types, with 0.47 V of voltage loss, but for a distance over 50 cm, precise data was not easy to obtain due to the weak light. To overcome these types of problems, specific values such as the changing conditions and efficiency value relevant to the light emitting parts and the visible light-receiving sensor should be calculated, and continuous study and improvements should also be realized for better communication conditions.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.142-146
• /
• 2012

Today, the demand for high-speed data communication and mobile communication has exploded. Thus, there is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication with these characteristics consists of a master unit (MU) and a slave unit (SU). However, the digital optical units that are currently commercialized or being developed transmit data without compression. Thus, digital optical communication using these units is restricted by the quantity of optical frames when adding diversity or operating with various combinations of CDMA, WCDMA, WiBro, GSM, LTE, and other mobile communication technologies. This paper suggests the application of a data compression algorithm to a digital signal processor (DSP) chip as a field programmable gate array (FPGA) and a complex programmable logic device (CPLD) of a digital optical unit to add separate optical waves or to transmit complex data without specific changes in design of the optical frame.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.66 no.1
• /
• pp.179-185
• /
• 2017

Communication technologies hold a significant place in the swarm flight of drones for surveillance, inspection of disasters and calamities, entertainment performances, and drone collaborations. A GCS(ground control station) for the control of drone swarms needs its devoted communication method to control a large number of drones at the same time. General drone controllers control drones by connecting transmitters and drones in 1:1. When such an old communication method is employed to control many drones simultaneously, problems can emerge with the control of many transmitter modules connected to a GCS and frequency interference among them. This study implemented a transmitter controller to control many drones simultaneously with a communication chip of 2.4GHz ISM band and a Cortex M4-based board. It also designed a GCS to control many transmitter controllers via a network. The hierarchical method made it possible to control many more drones. In addition, the problem with frequency interference was resolved by implementing a time- and frequency-sharing method, controlling many drones simultaneously, and adding the frequency hopping feature. If PPM and S.BUS protocol features are added to it, it will be compatible with more diverse transmitters and drones.

• Journal of Power Electronics
• /
• v.15 no.4
• /
• pp.861-875
• /
• 2015

This paper presents a wide frequency range LLC resonant controller IC for LED backlight units. In this paper a new phase-domain resonance deviation prevention circuit (RDPC), which covers a wide frequency and input voltage range, is proposed. In addition, a wide range gate clock generator and an automatic dead time generator are proposed. The chip is fabricated using 0.35 μm BCD technology. The die size is 2 x 2 mm2. The frequency of the clock generator ranges from 38 kHz to 400 kHz, and the dead time ranges from 300 ns to 2 μs. The current consumption of the LLC resonant controller IC is 4 mA for a 100 kHz operation frequency using a supply voltage of 15 V.

• Journal of Power Electronics
• /
• v.13 no.2
• /
• pp.313-321
• /
• 2013

This paper describes the operation analysis results of a communication-based DC micro-grid using a hardware simulator developed in the lab. The developed hardware simulator is composed of distributed generation devices such as wind power, photovoltaic power and fuel cells, and energy storage devices such as super-capacitors and batteries. Whole system monitoring and control was implemented using a personal computer. The power management scheme was implemented in a main controller based on a TMS320F28335 chip. The main controller is connected with the local controller in each of the distributed generator and energy storage devices through the communication link based on a CAN or an IEC61850. The operation analysis results using the developed hardware simulator confirm the ability of the DC micro-grid to supply the electric power to end users.