• 대한치과교정학회지
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• 제27권1호
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• pp.45-54
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• 1997

본 연구의 목적은 bionator를 사용한 II급 1류 부정교합 환자의 치료후 결과를 토대로 치료전에 치료후 결과를 예측할 수 있는 항목들을 알아봄으로써 성장하는 II급 1류 부정교합을 가진 환자들의 치료에 도움을 얻는데 있다. bionator를 사용한 앵글 II급 1류 부정교합 환자 48명의 치료후 두부방사선계측사진을 통해 치료결과가 양호한 군(1군)과 치료결과가 불량한 군(2군)으로 나눈 후 양군의 치료전 측모두부방사선계측사진의 비교분석을 통해 두군 사이에 차이를 보이는 계측항목들을 알아보았고, 판별분석을 통해 다음의 결과를 얻을 수 있었다. 1. 치료전 골격계측 항목으로는 ANB, facial convexity angle, AB to facial plane angle 등이, 치성계측 항목으로는 L1 to A-Pog, U1 to facial plane, L1 to facial plane 등이, 연조직 계측항목으로는 Ricketts esthetic line 상에서 상, 하순의 돌출도가 양군 사이에 유의한 차를 보였다(SAS t-test, p<0.05). 2. 판별분석을 통해 유의성있게 나타나는 항목의 순위를 본 결과 L1 to facial plane, 하순의 돌출도, ANB과 FMIA 등이 양군의 치료결과의 예측에 도움을 주는 것으로 나타났다. 3. 증감판별분석을 통해 서로 독립적이며 상관계수가 높은 3개의 변수 - L1 to facial plane, articular angle, ANB- 를 선택하였으며, 이를 토대로 판별식을 도출하였다.

• ETRI Journal
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• 제34권6호
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• ETRI Journal
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• 제36권6호
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• pp.924-930
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• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• 대한치과교정학회지
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• 제26권5호
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• pp.487-495
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• 1996

본 연구는 제 1 소구치 발치로 양호하게 치료된 Class I 전돌 환자의 치료 전 안모 골격 특성과 치료 전후 변화를 조사하여 Class I 전돌 환자의 치료 계획 수립에 이용하고자 하였다. 서울대학교 병원 치과 진료부 교정과에 내원하여 치열궁 길이 부조화의 양이 7.00mm 를 넘지 않고 Class I 전돌 환자로 진단되어 상, 하악 제 1소구치를 발거한 후 동일한 임상가에 의하여 동일 치료 기법으로 양호하게 치료된 환자 35명 (여자 27명, 남자 8명) 을 대상으로 치료 전후 측모 두부 방사선 사진을 계측하여 다음과 같은 결과를 얻었다. 1. 치료 전후 골격 형태는 크게 변하지 않았고 치열, 치조골, 연조직에서 치료 후 유의성 있는 변화가 있었다. 2. 치료 전 골격 형태는 SN-GoGn이 $36.56^{\circ}$, AB-MP이 $66.92^{\circ}$, ODI가 $69.17^{\circ}$, APDI가 $81.31^{\circ}$, CF $150.52^{\circ}$로서 수직적인 부조화 경향을 보였다. 3. 치료 전 치열 형태는 절치간 각이 $113.11^{\circ}$, U1 to FH가 $117.78^{\circ}$, L1 to A-Pog이 7.94mm 였으며 연조직 측모상 E line에 대하여 상순이 2.88mm, 하순이 5.43mm 돌출되어 있었다. 4. 치료 후 치열 형태는 절치간 각이 $14.46^{\circ}$ 증가되었으며 연조직 측모상 E line에 대하여 상순이 2.45mm, 하순이 3.2mm후방이동되었다. (P<0.001 ) 5. 치료 전 발치 지수 (EI)는 138.71이었고 치료 후 EI는 148.2였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1120-1122
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• 1995

This paper presents a 2-stage, simple, power-efficient 3V CMOS operational amplifier and its equation based design optimization. Because of its simple structure, it is very suitable as a VLSI library cell in analog/digital mixed-mode systems. The op-amp, which contains a constant-$g_m$ rail-to-rail input stage and a simple feedforward class-AB rail-to-rail output stage, is analyzed and the results are presented in the form of design equations and procedures, which provide an insight into the trade-offs among performance requirements. The results of SPICE simulations are shown to agree very welt with the use of design equations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.333-336
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• 2002

An alternative CMOS implementation of a multi-output four-terminal floating nullor (FTFN) with constant-g$_{m}$ rall-to-rail input stage is proposed. This presented circuit is based on the advantages of a complementary transconductance amplifier and class AB dual translinear cell circuit that comes up with wide bandwidth. The constant-g$_{m}$ characteristic is controlled by the maximum-current selection circuits, maintaining the smooth response over the change of input common mode voltage. The circuit performances are confirmed through HSPICE simulations. A current-mode multifunction filter is used to exhibit the potentiality of this proposed scheme.eme.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.82-85
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• 2002

A compact rail to rail CMOS voltage follower is presented. The circuit is based on the symmetrical class AB voltage follower and can operate under supply voltages of ${\pm}$ 1.5 V. The proposed circuit has power dissipation of 5.2㎽ under quiescent condition and can drive ${\pm}$1.25 V to 250$\Omega$ load with a total harmonic distortion of less than 0.5 percent and cut off frequency of 237 ㎒. Although simple, the proposed circuit enables the output transistors to drive load efficiently.

• 천문학회지
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• 제38권2호
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• pp.73-75
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• 2005

The latest scientific highlights obtained with the Subaru telescope are given together with its current status and on-going instrumentation. We have been successfully operating the telescope and 8 observatory instruments (including an adaptive optics system) since January 1999, when the first light was accomplished. Open-use of Subaru began in December 2000. Subaru has a unique capability of its prime focus among other 8-10 meter class telescopes and has an excellent imaging performance as a result of its sophisticated active optics combined with the high stability of the sky at Mauna Kea. Scientific highlights are given on the discoveries of the most distant galaxies, spiral structure on a protoplanetary disk around AB Aur, and planetesimal belts in the debris disk around $\beta$ Pic. Brief summaries are given for three new instruments: the Multi-Object Infrared Camera and Spectrograph (MOIRCS), 188 element adaptive optics system, and Fiber Multi-Object Spectrograph (FMOS)

• 전자공학회논문지B
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• 제33B권3호
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• pp.47-55
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• 1996

An optical transmitter, which is a key component of the optical transmission system, converts the electrical signal to optical signal and consists of a high-speed current-pulse driver for laser diode and low-speed feedback loops that stabilize optical power against aging, power supply voltage fluctuations, and ambient temperature changes. In this paper, the power-stabilizing part, which forms the bulk of the optical transmitter circuitry was designed in integrted circuits. Operational amplifiers and reference voltage generation circuits, which were identified as key building blocks for the power-stabilizing feedback loops, were designed and were subsequently verified through HSPICE simulations. The designed operational amplifier consists of a two-stage folded cascode amplifier and class AB output stage, whereas the reference voltage is obtained by bandgap reference circuits. Finally the power-stabilizing circuitry was laid out based on 3\mu$m CMOS design rules for fabrication.

• 전자공학회논문지S
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• 제34S권5호
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• pp.94-103
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• 1997

It is necesary that analog buffer circuit should drive an external load in the VLSI design such as switched capacitor efilter (SCF), D/A converter, A/d converter, telecommunicatin circuit, etc. The conventional CMOS buffer circuit have many probvlems according as CMOS technique. Firstly, Capacity of large load ar enot able to opeate well. The problem can be solve to use class AB stages. But large load are operated a difficult, because an element of existing CMOS has a quadratic functional relation with inptu and outut voltage versus output current. Secondly, whole circuit of dynamic rang edecrease, because a range of inpt and output voltages go down according as increasing of intergration rate drop supply voltage. In this paper suggests that new differential CMOS line driver make out of operating an external of large load. In telecommunication's chip case transmission line could be a load. It is necessary that a load operate line driver. The proposal circuit is planned to hav ea high generation power rnage of voltage with preservin linearity. And circuit of capability is inspected through simulation program (HSPICE).