• Title/Summary/Keyword: Circuits

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A Study on Suwenliuqixuanzhumiyu (소문육기현주밀어(素問六氣玄珠密語)에 관한 연구(硏究))

  • Yun, Chang-yeol
    • Journal of Korean Medical classics
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    • v.29 no.4
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    • pp.61-73
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    • 2016
  • Objectives : Suwenliuqixuanzhumiyu is a book that strongly influenced the following generations' theory of five Circuits and six Qi. It is understood that Wangbing authored the book during the Tang dynasty, but another theory suggests that a nameless author devised the book falsely in Wangbing's name. A comprehensive research is greatly significant in the development of the theory of five Circuits and six Qi. Methods : The study will focus on the analysis on the truth about Suwenliuqixuanzhumiyu, its impact on the following generations' theory of five Circuits and six Qi, the contents and comparison of Suwen's xuanzhumiyu, and the 17 books and 27 chapters of xuanzhumiyu. Results & Conclusions : First, xuanzhu was authored by Wangbing sometime around 762 AD, and Suwenliuqixuanzhumiyu was written in 690 during the rule of Empress Wu Zetian, meaning that Wangbing is not the author of Suwenliuqixuanzhumiyu. Second, Wangbing's style of writing is regular yet elegant, and keeps itself within the range of medical style of writing, but Suwenliuqixuanzhumiyu is written in a very rough style, and finds itself within the range of Tao literatures and books on trickery. Third, Wangbing's xuanzhu is a commentary on Suwen, whereas Suwenliuqixuanzhumiyu is consisting of the theory of five Circuits and six Qi, and trickeries predictive picture. As such, the two books have entirely different characters. Theories that received relatively significant impacts to the following generations' the theory of five Circuits and six Qi include Gandeokbu, Jeongwhadaewha, and the Calculation method of normal Qi. Suwen's chapter on the theory of five Circuits and six Qi and Suwenliuqixuanzhumiyu have many inconsistent and differing theories, leading the scholars to believe that they are dealing with different theory of five Circuits and six Qi which derived from separate schools of beliefs.

The Effects of a Task-Related Circuits Program on Functional Improvements in Stroke Patients (뇌졸중 환자에서 순환식 과제지향 프로그램이 기능 증진에 미치는 효과)

  • Cho, Gyu-Hang;Lee, Suk-Min;Woo, Young-Keun
    • Physical Therapy Korea
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    • v.11 no.3
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    • pp.59-70
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    • 2004
  • The purpose of this study was to propose a task-related circuits program for stroke patients and to test the difference in functional improvements between patients undergoing conventional physical therapy and those participating in a task-related circuits exercise program. The subjects were 10 stroke in-patients of the Korea National Rehabilitation Center in Seoul. We measured the following variables: Motor Assessment Scale (MAS), Berg Balance Scale (BBS), Tone Assessment Scale (TAS), speed of gait, rate of step, physiological costs index, age, weight, height, site of lesion, onset day and whether the subject participated in an exercise program. Collected data were statistically analyzed by SPSS 10.0/PC using descriptive statistics, Mann-Whitney U test, Wilcoxon rank sum test and Spearman's correlation. The results of the experiment were as follows: (1) In the pre-test and post-test for function, there was not a statistical significance between the group partaking in a task-related circuits program and the group of conventional physical therapy (p>.05). (2) In the MAS, BBS and speed of gait test, the group undergoing conventional physical therapy showed a statistical significance (p<.05). (3) In the MAS, BBS, speed of gait, PCI, TAS (passive, associated reaction, TAS total score), the group of task-related circuits program showed a statistical significance (p<.05). As a result, the group participating in a task-related circuits program had a more functional improvement than the group participating in conventional physical therapy. Therefore, an intervention recommended for a stroke patient would be a task-related circuits program consisting of a longer session of each task for a more improved functional recovery.

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A new interfacing circuit for low power asynchronous design in sensor systems (센서시스템에서의 저전력 비동기 설계를 위한 인터페이싱 회로)

  • Ryu, Jeong Tak;Hong, Won Kee;Kang, Byung Ho;Kim, Kyung Ki
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.1
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    • pp.61-67
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    • 2014
  • Conventional synchronous circuits in low power required systems such as sensor systems cannot only satisfy the timing requirement of the low voltage digital systems, but also they may generate wrong outputs under the influence of PVT variations and aging effects. Therefore, in the reliable ultra-low power design, asynchronous circuits have recently been reconsidered as a solution for scaling issues. However, it is not easy to totally replace synchronous circuits with asynchronous circuits in the digital systems, so the interfacing between the synchronous and asynchronous circuits is indispensable for the digital systems. This paper presents a new design for interfacing between asynchronous circuits and synchronous circuits, and the interface circuits are applied to a $4{\times}4$ multiplier logic designed using 0.11um technology.

Synthesis of Multi-level Reed Muller Circuits using BDDs (BDD를 이용한 다단계 리드뮬러회로의 합성)

  • Jang, Jun-Yeong;Lee, Gwi-Sang
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.3
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    • pp.640-654
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    • 1996
  • This paper presents a synthesis method for multi-level Reed-Muller circuits using BDDs(Binary Decision Diagrams). The existing synthesis tool for Reed circuits, FACTOR, is not appropriate to the synthesis of large circuits because it uses matrix (map-type) to represent given logic functions, resulting in the exponential time and space in number of imput to the circuits. For solving this problems, a syntheisis method based on BDD is presented. Using BDDs, logic functions are represented compactly. Therefor storage spaces and computing time for synthesizing logic functions were greatly decreased, and this technique can be easily applied to large circuits. Using BDD representations, the proposed method extract best patterns to minimize multi-level Reed Muller circuits with good performance in area optimization and testability. Experimental results using the proposed method show better performance than those using previous methods〔2〕. For large circuits of considering the best input partition, synthesis results have been improved.

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Thai Phoneme Segmentation using Dual-Band Energy Contour

  • Ratsameewichai, S.;Theera-Umpon, N.;Vilasdechanon, J.;Uatrongjit, S.;Likit-Anurucks, K.
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.110-112
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    • 2002
  • In this paper, a new technique for Thai isolated speech phoneme segmentation is proposed. Based on Thai speech feature, the isolated speech is first divided into low and high frequency components by using the technique of wavelet decomposition. Then the energy contour of each decomposed signal is computed and employed to locate phoneme boundary. To verity the proposed scheme, some experiments have been performed using 1,000 syllables data recorded from 10 speakers. The accuracy rates are 96.0, 89.9, 92.7 and 98.9% for initial consonant, vowel, final consonant and silence, respectively.

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Analysis of LSI Circuits Coupled with RCG Interconnects - Asymptotic Method

  • A.Ushida;Ha, A.ttori;H.Sakaguchi;Y.Yamagami;Y.Nishio
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.70-73
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    • 2002
  • High frequency digital LSI circuits are usually composed of many sub-circuits coupled with interconnects. They sometimes causes serious problems of the fault switching by time-delays, crosstalks, reflections of signals and so on. Therefore, it is very important to develop a user-friendly simulator for solving these problems. Although a moment matching method is widely used as the reduction technique of interconnects, it may happen to arise erroneous results for evaluating the poles far from the origin. In this paper, we show an asymptotic method in the complex frequency-domain, where we calculate the exact poles and residues giving large effect to the transient responses. Then, the interconnects are replaced by the asymptotic equivalent circuits using the poles and residues. Thus, we can develop a users-friendly simulator using the equivalent circuits.

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Evaluation of fault coverage of digital circutis using initializability of flipflops (플립플롭의 초기화 가능성을 고려한 디지탈 회로에 대한 고장 검출율의 평가 기법)

  • 민형복;김신택;이재훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.4
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    • pp.11-20
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    • 1998
  • Fault simulatior has been used to compute exact fault coverages of test vectors for digial circuits. But it is time consuming because execution time is proportional to square of circuit size. Recently, several algorithms for testability analysis have been published to cope with these problems. COP is very fast and accurate but cannot be used for sequential circuits, while STAFAN can be used for sequential circuits but needs vast amount of execution time due to good circuit simulation. We proposed EXTASEC which gave fast and accurate fault coverage. But it shows noticeable errors for a few sequential circuits. In this paper, it is shown that the inaccuracy is due to uninitializble flipflops, and we propose ITEM to improve the EXTASEC algorithm. ITEM is an improved evaluation method of fault coverage by analysis of backward lines and uninitializable flipflops. It is expected to perform efficiently for very large circuits where execution time is critical.

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Analysis and Design of LCL Filter with Passive Damping Circuits for Three-phase Grid-connected Inverters

  • Ahn, Hyo Min;Oh, Chang-Yeol;Sung, Won-Yong;Ahn, Jung-Hoon;Lee, Byoung Kuk
    • Journal of Electrical Engineering and Technology
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    • v.12 no.1
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    • pp.217-224
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    • 2017
  • The analysis and design process of the LCL filter with passive damping circuits for three-phase grid-connected inverter are presented based on the generalized model of LCL filter. Several types of the passive damping circuits in previous studies could be compared and analyzed by using the generalized model considering various design criteria of passive damping circuits. According to the analysis in this paper, a reasonable configuration of passive damping circuits for three-phase grid-connected inverters is proposed. The validity of the proposed design process is verified by informative simulation and experimental results.

Development of Inter-Turn Short Circuits Sensor for Rotor Winding of Synchronous Generator (발전기 회전자의 층간단락 감지기 개발)

  • Nam, Jong-Ha;Lee, Seung-Hak;Choe, Gyu-Ha
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.6
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    • pp.307-312
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    • 2002
  • Inter-turn short circuits can have significant effects on a generator and its performance. The Inter-turn short circuits sensor for synchronous generator's field winding has been developed. The sensor, installed in the generator air-gap, senses the slot leakage flux of field winding and produces a voltage waveform proportional to the rate of change of the flux. For identification of reliability for sensor, a shorted- turn test was performed at the Seoinchon combined cycle power plant on gas turbine generator and stim turbine generator. This sensor will be used as a detecting of Inter-turn short circuits for synchronous generator's field winding.