• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1999년도 추계종합학술대회 논문집
• /
• pp.388-391
• /
• 1999

This Paper presents an efficient algorithm that minimizes the area of the combinational system through cell replacement. During the minimization, it maintains the circuit speed same. For the minimization, the proposed algorithm defines the criticality of each cell, based on the critical delay and the number of paths passing through the cell. Then, it visits the cells of the system, one by one, from the one with the lowest criticality, and replaces it with the minimum area cell that satisfies the delay constraint. Experimental results, using the LGsynth91 benchmark circuits synthesized by misII, show that the proposed algorithm reduces the circuit area further by 17.54% on the average without sacrificing the circuit speed.

• 한국정밀공학회지
• /
• 제19권10호
• /
• pp.163-170
• /
• 2002

The dynamic model of a high-speed vacuum circuit breaker mechanism with spring-actuated cam and linkage is derived to simulate the high-speed closing and opening operations. Its validation for an analysis of high-speed motion behavior is checked through experiments. The characteristics of the friction on the camshaft are investigated using the nonlinear pendulum experiment. The parameters of the friction model are estimated using the optimization technique. The analysis exhibits that the friction of the pendulum depends on stick-slip, Stribeck effect and viscous damping. Comparing simulation results with actual responses using a high-speed camera, the appropriateness of derived dynamic models for the rapid closing and opening operations is shown. The spring motion, which has much influence on the closing responses, is observed.

• 전자공학회논문지A
• /
• 제31A권9호
• /
• pp.146-155
• /
• 1994

In this paper, we desribe a new system, called BEST, that is used to develop a macromodel or behavioral model easily. It automatically calculates the component values of macromodel represented by equations to satisfy the given specification. Also, it gives the way to analyze both the behavioral model and transistor level circuit, and then compare the analysis results of them to check the correspondence under specific temperature and bias condition, and BEST optimizes the component values of macromodel. Other feature is to characterize MOSFET as switch model which consists of PWL-RC network. Finally, it is possible to generage multi-level netlist which consists of macro/switch/transistor level circuits, and user can determine the trade-off between simulation speed and accuracy. With the graphic user interface form of macromodel development system described above. BEST enable designers to make macromodel by themselves and to uas it. We applied BEST to develop the macromodel for the test circuit and got the 18.6 times simulation speed up with preserving the accuracy within 10% compared to the conventional transistor level circuit simulation. Also, applicability of optimization capability was verified.

• 한국조명전기설비학회:학술대회논문집
• /
• 한국조명전기설비학회 2008년도 추계학술대회 논문집
• /
• pp.113-115
• /
• 2008

This paper shows the method of modeling and simulation of LED driver circuit. Simplified LED modeling is introduced and a driver IC, HV9910, is modeled by implementing the major function blocks. Circuit of buck type converter is constructed for simulation. Simulation includes the internal function of IC and various performances such as LED array current control and dimming. This results show that simulation approach is valid for circuit optimization and reduction of development time.

• 한국초전도저온공학회:학술대회논문집
• /
• 한국초전도저온공학회 2003년도 추계학술대회 논문집
• /
• pp.113-116
• /
• 2003

Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11％. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10％ more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33％. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15％.

• 한국음향학회지
• /
• 제15권4호
• /
• pp.77-82
• /
• 1996

본 연구에서는 샌드위치형 압전 트랜스듀서의 등가 회로 모델을 규명하는 방법을 제시하였다. 공기중에서 실험적으로 측정한 트랜스듀서의 전기적 어드미턴스와 이론적으로 계산된 어드미턴스의 오차가 최소가 되도록 하는 비선형 최적화 문제를 풀어 등가 회로에 관련된 미지 상수를 규명하였다. 예제 트랜스듀서에 대해 제안된 방법을 적용하여 등가회로를 모델링하고, 수중에서의 송신 음압 감도(TVR) 및 수신 읍압 감도(RVS)을 예측하고 실험치와 비교하여 규명된 등가 회로 모델의 타당성을 검증하였다.

• 한국광학회:학술대회논문집
• /
• 한국광학회 1989년도 제4회 파동 및 레이저 학술발표회 4th Conference on Waves and lasers 논문집 - 한국광학회
• /
• pp.176-179
• /
• 1989

The optimization of the monolithic pin-FET receiver is discussed, with emphasis on the sensitivity and bandwidth. The amplifier circuit, bias resistance, total input capacitance, and transconductance of FET for the 2 Gbps transmission are calculated.

• 설비공학논문집
• /
• 제28권10호
• /
• pp.381-386
• /
• 2016

An optimization algorithm is developed based on a simulation case of a single family house model equipped with PV arrays. To increase the nationwide use of PV power generation facilities, a market-competitive electricity price needs to be introduced, which is determined based on the time of use. In this study, quadratic programming optimization was applied to minimize the electricity bill while maintaining the indoor temperature within allowable error bounds. For optimization, it is assumed that the weather and electricity demand are predicted. An EnergyPlus-based house model was approximated by using an equivalent RC circuit model for application as a linear constraint to the optimization. Based on the RC model, model predictive control was applied to the management of the cooling load and electricity for the first week of August. The result shows that more than 25% of electricity consumed for cooling can be saved by allowing excursions of temperature error within an affordable range. In addition, profit can be made by reselling electricity to the main grid energy supplier during peak hours.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2001년도 하계학술대회 논문집 B
• /
• pp.1169-1171
• /
• 2001

Synchronous reluctance motors(SynRM) for the application such as an electric vehicle, compressor drives of air conditioner and machine tool spindle drives require a wide field-weakening speed range. In order to improve the efficiency performance in such applications, this paper has examined the loss and the efficiency characteristics of SynRM mainly in the field-weakening speed region over the base speed. The control strategy in order to offer a efficiency optimization operation is shown and the copper and iron losses driven the equivalent circuit model of the machine is minimized. The usefulness of the proposed efficiency optimization control is verified through the SynRM durve system.

• International Journal of Control, Automation, and Systems
• /
• 제4권1호
• /
• pp.96-104
• /
• 2006

We propose a path planning method to improve the productivity of AOI (automated optical inspection) machines in PCB (printed circuit board) assembly lines. The path-planning problem is the optimization problem of finding inspection clusters and the visiting sequence of cameras to minimize the overall working time. A unified method is newly proposed to determine the inspection clusters and visiting sequence simultaneously. We apply a hybrid genetic algorithm to solve the highly complicated optimization problem. Comparative simulation results are presented to verify the usefulness of the proposed method.