The Design of GaInAs/InP Monolithic PIN-FET Receiver

GaInAs/InP Monolithuic PIN-FET 광수신기의 설계

  • 박기성 (한국전자통신연구소 광전자연구실)
  • Published : 1989.02.01

Abstract

The optimization of the monolithic pin-FET receiver is discussed, with emphasis on the sensitivity and bandwidth. The amplifier circuit, bias resistance, total input capacitance, and transconductance of FET for the 2 Gbps transmission are calculated.

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