• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.8
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• pp.5534-5540
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• 2015

This In the railway signaling system, applications of axle counter in addition to track circuit goes on increasing for detecting train position. Consequently, this paper compares sensor methods of axle counter with between geo-magnetism method and proximity sensor method. And it presents differences and results, to improve reliabilities of train detection and axle counting. Also, this article presents an applied result which is based on field experience, with regard to installation, considering attachment condition of sensor part for accurate axle counting. This study acquires expandability that is able to perform not only axle counting function but also various other functions (direction detection of train, speed detection of train, and so on). It was a result of a change of design in order to judge phase difference of sensors, to improve reliability of axle counting. Furthermore, it does not subordinate to characteristics (type, weight of train). And it is confirmed that the omission of axle counting was not occurred in 350km/h. This was the result of Lab test after the construction of transfer equipment of trial axle and Test Bed for axle counting. Both of them are self-productions. Through this, it prepares foundation which is able to apply not only to train detection but also to speed of passing trains, formation number of trains, detector locking condition - when the train passes the section of switch point, and level crossing devices. Furthermore, it would be judged to contribute safety train operation if proximity sensor method applies to the whole railway signaling system from now on.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.7
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• pp.38-45
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• 2006

The superconducting fault current limiters(SFCLs) provide the effect such as enhancement in power system reliability due to limiting the fault current within a few miliseconds. Among various SFCLs we have developed a flux-lock type SFCL and exploited a special design to effectively reduce the fault current according to properly adjustable magnetic field after the short-circuit test. This SFCL consists of two copper coils wound in parallel on the same iron core and a component using the YBCO thin film connected in series to the secondary copper coil. Meanwhile, operating characteristics can be controlled by adjusting the inductances and the winding directions of the coils. To analyze the operational characteristics, we compared closed-loop with open-loop iron core. When the applied voltage was 200[Vrms] in the additive polarity winding, the peak values of the line current the increased up to 30.71[A] in the closed-loop and 32.01[A] in the open-loop iron core, respectively. On the other hand, in the voltages generated at current limiting elements were 220.14[V] in the closed-loop and 142.73[V] in the opal-loop iron core during first-half cycle after fault instant under the same conditions. We confirmed that the open-loop iron core had lower power burden than in the closed-loop iron core. Consequently, we found that the structure of iron core enabled the flux-lock type SFCL at power system to have the flexibility.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.1
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• pp.58-62
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• 2007

Digital communication is important for reliability and mobilization of the multi-channel communication systems. Transmitting and receiving data for the mobilization should be possible in anywhere and in anytime. And this system must be designed light weight small size and low power. One are essential technology for implementing the mobile wireless communication system on the age of ubiquotos. Requirements in constructing such communication field are followings. At first data transmitting and receiving should be carried out by a simple command. Second, the device should be designed as hand-hold type and low power consumption. Third, data communication should be reliable. As one of examples, car to car system which is popular in the market is introduced here, All traffic information in highway is transmitted from one car to another by using this system which can prevent possible traffic accident. This paper shows the design of a digital data communication system with CC1020 chip. This CC1020 makes easy frequency selection and easy switch from the transmit mode to the receive mode by simple setting of a memory register in the chip. The transmit power of this system is designed 10dBm and its communication range is about 100m. The power supplied this system is 3V considered as low power. The sleep mode can be easily entered during transmit mode or receive mode. We shows the program algorithm of CC1020 and interface circuit between MCU and CC1020. We shows the Photo of the CC1020 Module and Atmega128 Module.. We analysed the receiver rate with this system.

• Journal of the Korean Ceramic Society
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• v.40 no.10
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• pp.961-966
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• 2003

A Multi-Layer Ceramic (MLC) chip type Band-Pass Filter (BPF) using BiNb$\_$0.975/Sb$\_$0.025/ $O_4$ LTCC (Low Temperature Co-fired Ceramics) and MLC processing is presented. The MLC chip BPF has the benefits of low cost and small size. The BPF consists of coupled stripline resonators and coupling capacitors. The BPF is designed to have an attenuation pole at below the passband for a receiver band of IMT-2000 handset. The computer-aided design technology is applied for analysis of the BPF frequency characteristics. The attenuation pole depends on the coupling between resonators and the coupling capacitance. An equivalent circuit and structure of MLC chip BPF are proposed. The frequency characteristics of the manufactured BPF is well acceptable for IMT-2000 application.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.53-61
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• 2014

In this paper, we present the design, fabrication and measurement of high efficiency GaN HEMT power amplifier using harmonic matching technique. In order to achieve high efficiency, harmonic load-pull simulation is performed, that is, the optimum load impedances are determined at $2^{nd}$ and $3^{rd}$ harmonic frequencies as well as at the fundamental. Then, the output matching circuit is designed based on harmonic load-pull simulation. The measurement of the fabricated power amplifier shows the linear gain of 20 dB and $P_{1dB}$(1 dB gain compression point) of 33.7 dBm at 1.85 GHz. The maximum power added efficiency(PAE) of 80.9 % is achieved at the output power of 38.6 dBm, which belongs to best efficiency performance among the reported high efficiency power amplifiers. For W-CDMA input signal, the power amplifier shows a PAE of 27.8 % at the average output power of 28.4 dBm, where an ACLR (Adjacent Channel Leakage Ratio) is measured to be -38.8 dBc. Digital predistortion using polynomial fitting was implemented to linearize the power amplifiers, which allowed about 6.2 dB improvement of an ACLR performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.59-67
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• 2016

A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.18-24
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• 2012

This paper reports the test results of a 50MHz/s 10 bits DAC developed with $0.18{\mu}m$ CMOS process for the wireless sensor network application. The 10bits DAC, not likely a typical segmented type, has been designed as a current driving type with double step thermometer decoding architecture in which 10bits are divided into 6bits of MSB and 4bits of LSB. MSB 6bits are converted into 3 bits row thermal codes and 3 bits column thermal codes to control high current cells, and LSB 4 bits are also converted into thermal codes to control the lower current cells. The high and the lower current cells use the same cell size while a bias circuit has been designed to make the amount of lower unit current become 1/16 of high unit current. All thermal codes are synchronized with output latches to prevent glitches on the output signals. The test results show that the DAC consumes 4.3mA DC current with 3.3V DC supply for 2.2Vpp output at 50MHz clock. The linearity characteristics of DAC are the maximum SFDR of 62.02dB, maximum DNL of 0.37 LSB, and maximum INL of 0.67 LSB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.1
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• pp.13-21
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• 1997

In this paper, the oscillator type active antenna used as an element of active phased array antenna is designed and fabricated using slot coupling. The radiating element and active circuit are fabricated on each layer respectively and coupled electromagnetically through slot on the ground plane. This structure can solve the problems such as narrow bandwidth of microstrip antenna, spurious radiation by active circuits, and spaces for integration of the feeding circuits which are caused by integrating antennas with oscillator circuits in the same layer. The active antenna in this paper, the oscillation frequency can be tuned linearly by controlling the drain bias voltage of FET. The frequency tuning range is between 12.37 GHz to 12.65 GHz when bias voltage is varied from 3V to 9V, thus frequency tuning bandwidth is 280 MHz (2.24%). The output power of antenna is uniform within 5dB over frequency tuning range. Therefore this active antenna can be used as an element of linear or planar active phased array antennas.

• 대한공업교육학회지
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• v.41 no.2
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• pp.89-118
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• 2016

In this study, the model of Turtle Ship, which is evaluated as one of the world's first ironclad ship in battle as well as the traditional scientific and technological heritage in Korea, was combined with the Physical Computing Platform(Arduino and App Inventor) that enables students to learn the basic concepts of IT in an easy and fun way. Thus, this study contrived the Physical Computing Platform-based Turtle Ship model which will make the students of Industrial Specialized High School develop the technological literacy and humanities-based knowledge through flexible education out of stereotype and single subject as well as enhance the potential of creative convergence education. The following is a summary of the main results obtained through this study: First, Arduino-based Main-controller design and making is helpful to learn of the hardware and software knowledge about EEC(Electron Electronics Control) and to confirm the basic characteristics and performance of interaction of Arduino and actuators. Second, The fundamental Instructional environments of abilities such as implementing EEC systems, thinking logically, and problem-solving skills were provided by designing of pattern diagram, designing an actuator circuit and making, the creation of sketches as technical programming and developing of mobile app. Thirdly, This is physical computing platform based Turtle ship model that will enable students to bring up their technological literacy and interest in the cultural heritage.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.