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http://dx.doi.org/10.3745/KIPSTA.2004.11A.2.115

Implementation of Multiple-Valued Adder and Multiplier Using Current-Mode CMOS  

Seong, Hyeon-Kyeong (상지대학교 컴퓨터·정보공학부)
Publication Information
The KIPS Transactions:PartA / v.11A, no.2, 2004 , pp. 115-122 More about this Journal
Abstract
In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.
Keywords
Multiple-Valued Logic; Current-Mode CMOS; Finite Fields, GF $(p^m)$; T-gate; Multiple-Valued Adder; Multiple-Valued Multiplier;
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