• 제목/요약/키워드: Circuit Constant Design

검색결과 224건 처리시간 0.024초

고효율 마이크로파 무선 전력 수신 집적회로 설계 및 구현 (A Design of High Efficiency Microwave Wireless Power Acceptor IC)

  • 정원재;정효빈;김상규;장종은;박준석
    • 전기학회논문지
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    • 제62권8호
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    • pp.1125-1131
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    • 2013
  • Wireless power transmission technology has been studied variety. Recently, wireless power transmission technology used by resonance and magnetic induction field is applied to various fields. However, magnetic resonance and inductive coupling are have drawbacks - power transmission distance is short. Microwave transmission and accept techniques have been developed to overcome short distance. However, improvement in efficiency is required. This paper, propose a high-efficiency microwave energy acceptor IC(EAIC). Suggested EAIC is consists of RF-DC converter and DC-DC converter. Wide Input power range is -15 dBm ~ 20 dBm. And output voltage is boosted up to 5.5 V by voltage boost-up circuit. EAIC can keep the output voltage constant. Available efficiency of RF-DC converter is 95.5 % at 4 dBm input. And DC-DC efficiency is 94.79 % at 1.1 mA load current. Fully EAIC efficiency is 90.5 %.

전기이중층커패시터의 가속열화시험 (An Accelerated Degradation Test of Electric Double-Layer Capacitors)

  • 정재한;김명수
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제12권2호
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    • pp.67-78
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    • 2012
  • An electric double-layer capacitor(EDLC) is an electrochemical capacitor with relatively high energy density, typically hundreds of times greater than conventional electrolytic capacitors. EDLCs are widely used for energy storage rather than as general-purpose circuit components. They have a variety of commercial applications, notably in energy smoothing and momentary-load devices, and energy-storage and kinetic energy recovery system devices used in vehicles, etc. This paper presents an accelerated degradation test of an EDLC with rated voltage 2.7V, capacitance 100F, and usage temperature $-40^{\circ}C{\sim}65^{\circ}C$. The EDLCs are tested at $50^{\circ}C$, $60^{\circ}C$, and $70^{\circ}C$, respectively for 1,750hours, and their capacitances are measured at predetermined times by constant current discharge method. The failure times are predicted from their capacitance deterioration patterns, where the failure is defined as 30% capacitance decrease from the initial one. It is assumed that the lifetime distribution of EDLC follows Weibull and Arrhenius life-stress relationship holds. The life-stress relationship, acceleration factor, and $B_{10}$ life at design condition are estimated by analyzing the accelerated life test data.

Design of a TRIAC Dimmable LED Driver Chip with a Wide Tuning Range and Two-Stage Uniform Dimming

  • Chang, Changyuan;Li, Zhen;Li, Yuanye;Hong, Chao
    • Journal of Power Electronics
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    • 제18권2호
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    • pp.640-650
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    • 2018
  • A TRIAC dimmable LED driver with a wide tuning range and a two-stage uniform dimming scheme is proposed in this paper. To solve the restricted dimming range problem caused by the limited conduction ratio of TRIAC dimmers, a conduction ratio compensation technique is introduced, which can increase the output current up to the rated output current when the TRIAC dimmer turns to the maximum conduction ratio. For further optimization, a two-stage uniform dimming diagram with a rapid dimming curve and a slow dimming curve is designed to make the LED driver regulated visually uniform in the whole adjustable range of the TRIAC dimmer. The proposed control chip is fabricated in a TSMC $0.35{\mu}m$ 5V/650V CMOS/LDMOS process, and verified on a 21V/500mA circuit prototype. The test results show that, in the 90V/60Hz~132V/60Hz ac input range, the voltage linear regulation is 2.6%, the power factor is 99.5% and the efficiency is 83%. Moreover, in the dimming mode, the dimming rate is less than 1% when the maximum dimming current is 516mA and the minimum dimming current is only about 5mA.

Evaluation Methods and Design for Bioartificial Liver Based on Perfusion Model

  • Park Yueng Guen;Ryu Hwa-Won
    • Biotechnology and Bioprocess Engineering:BBE
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    • 제10권1호
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    • pp.9-15
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    • 2005
  • A bioartificial liver (BAL) is a medical device entrapping living hepatocytes or immortalized cells derived from hepatocytes. Many efforts have already been made to maintain the functions of the hepatocytes in a BAL device over a long term. However, there is still some uncertainty as to their efficacy. and their limitations are unclear. Therefore, it is important to quantitatively evaluate the metabolic functions of a BAL. In previous studies on in vitro BAL devices, two test methods, an initial bolus loading and constant-rate infusion plus initial bolus loading, were theoretically carried out to obtain physiologic data on drugs. However, in the current study, the same two methods were used as a perfusion model and derived the same clearance characterized by an interrelationship between the perfusate flow rate and intrinsic clearance. The interrelationship indicated that the CL increased with an increasing perfusate flow rate and approached its maximum value, i.e. intrinsic clearance. In addition, to set up an in vivo BAL system, the toxic plateau levels in the BAL system were calculated for both series and parallel circuit models. The series model had a lower plateau level than the parellel model. The difference in the toxic plateau levels between the parallel and series models increased with an increasing number of BAL cartridges.

고주파자계측정용 센서에 관한 연구 (A Study on the Sensor for Measuring the High Frequency Magnetic Fields)

  • 이복희;정승수;박형기;백용현;임동묵
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1992년도 추계학술대회 논문집
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    • pp.114-117
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    • 1992
  • 본 논문에서는 자기적분형 자계센서의 설계방법과 교정방법을 제안하고, 파도대전류에 의하여 형성되는 자계에 대한 거리-응답 특성시험과 주파수 변화에 대한 응답도의 측정을 수행하였다. 자기적분형 센서는 적분저항의 증가와 더불어 감지전압은 상승하였으나 감쇠시간은 줄어드는 특성을 나타내었다. 또한 전기적 등가회로를 구성하여 이론적으로 해석 한 바 실험결과와 잘 일치하였다.

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GSM/CDMA 대역용 LTCC Diplexer 설계 연구 (Study on a LTCC Diplexer Design for GSM/CDMA Applications)

  • 김태완;이영철
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2008년도 추계종합학술대회 B
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    • pp.632-635
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    • 2008
  • 본 논문에서는 LTCC 다층회로 기술을 이용하여 GSM/CDMA 대역을 분리하는 Diplexer를 설계하였다. Diplexer의 집적도를 높이기 위해 3차원 적층형 인덕터와 커패시터를 이용하여 설계되었다. Diplexer는 유전율 7.2인 총 6층의 LTCC 기판에 설계되었고, 설계 되어진 다이플렉서의 크기는 CB-CPW pad를 포함하여 $3,450{\times}4,000{\times}600{\mu}m^3$이다. GSM 대역의 통과 필터는 -0.23dB 이하의 삽입 손실과 -10dB 이하의 반사 손실, CDMA 대역의 통과 필터는 -0.53dB 이하의 삽입 손실과 -10dB 이하의 반사 손실의 특성을 보였다.

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저가형 유기 SOP 적용을 위한 저온 공정의 $BaTiO_3$ 임베디드 커페시터 설계 및 제작 (Design and Fabrication of Low Temperature Processed $BaTiO_3$ Embedded Capacitor for Low Cost Organic System-on-Package (SOP) Applications)

  • 이승재;박재영;고영주
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1587-1588
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    • 2006
  • Tn this paper, PCB (Printed Circuit Board) embedded $BaTiO_3$ MIM capacitors were designed, fabricated, and characterized for low cost organic SOP applications by using 3-D EM simulator and low temperature processes. Size of electrodes and thickness of high dielectric films are optimized for improving the performance characteristics of the proposed embedded MIM capacitors at high frequency regime. The selected thicknesses of the $BaTiO_3$ film are $12{\mu}m$, $16{\mu}m$, and $20{\mu}m$. The fabricated MIM capacitor with dielectric constant of 30 and thickness of $12{\mu}m$ has capacitance density of $21.5p\;F/mm^2$ at 100MHz, maximum quality factor of 37.4 at 300 MHz, a quality factor of 30.9 at 1GHz, self resonant frequency of 5.4 GHz, respectively. The measured capacitances and quality factors are well matched with 3-D EM simulated ones. These embedded capacitors are promising for SOP based advanced electronic systems with various functionality, low cost, small size and volume.

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NKN 무연압전 액추에이터의 신뢰성 연구 (An Investigation on the Aging Properties of NKN Lead-free Piezoelectric Multi-layer Ceramic Actuators)

  • 채문순;이규탁;고중혁
    • 한국전기전자재료학회논문지
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    • 제24권10호
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    • pp.803-806
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    • 2011
  • 1 mol% $Li_2O$ excess $0.9(Na_{0.52}K_{0.48})NbO_3-0.1LiTaO_3$ lead-free piezoelectric multilayer ceramic actuators were investigated to determine their aging properties. To reduce the thermal aging behavior, we applied a rectified unipolar electric field of 5 kV/mm to the specimen to accelerate the electric aging behavior. By employing a rectified unipolar electric field for the piezoelectric actuators, we could remove undesirable heating from the relaxation current in the motion of the ferroelectric domain. To accelerate the aging test, the applied electric fields had a frequency of 900 Hz. To have enough time for charging and discharging, we employed an accurate time constant to design the equivalent circuit model for the aging tester. To extract exact aging behavior, we measured the pseudo-piezoelectric coefficient before and after the aging process. We also measured the electro-mechanical coupling coefficient, the frequency-dependent dielectric permittivity, and the impedance to compare with fresh and aged specimen.

마이크로프로세서 제어를 이용한 DC-DC Buck Converter 설계 (Design of DC-DC Buck Converter Using Micro-processor Control)

  • 장인혁;한지훈;임홍우
    • 공학기술논문지
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    • 제5권4호
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    • pp.349-353
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    • 2012
  • Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.

가유전체 기판을 이용한 소형화된 링 하이브리드 커플러의 설계 (Design of a Size-reduced Ring Hybrid Coupler Using an Artificial Dielectric Substrate)

  • 임종식
    • 한국산학기술학회논문지
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    • 제15권5호
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    • pp.3139-3145
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    • 2014
  • 본 논문에서는 가유전체 기판을 이용하여 소형화한 마이크로파 대역의 링 하이브리드 커플러 설계에 대하여 기술한다. 가유전체 기판은 다수의 비어홀을 제 2기판에 삽입하여 유효 커패시턴스를 크게 증가시킨 구조를 갖는다. 가유전체 기판의 유효유전율은 표준형 기판에 비하여 크게 증가하게 되는데, 이에 의하여 동일한 전기적 길이 대비 물리적 길이가 크게 감소하므로 마이크로파 전송선로를 소형화시킬 수 있다. 이런 원리를 마이크로파 무선회로 설계에 적용한 사례를 보이기 위하여 가유전체 기판을 이용하여 3GHz대 링 하이브리드 커플러를 설계하고 실제로 제작 및 측정한 결과를 제시한다. 설계된 소형화된 링 하이브리드 커플러는 표준형에 비하여 전기적 성능은 유사하면서도 65%의 크기를 가진다. 측정된 전력분배비는 각각 -3.05dB와 -3.135dB이며, 두 출력간의 위상차는 동위상일 때 3도, 역위상일 때 176도로 이상적인 값과 매우 유사하다. 이로써 가유전체 기판구조로 소형화된 링 하이브리드 커플러의 설계가 타당함을 보인다.