• 제목/요약/키워드: Circuit

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이중 과제유형에 따른 순환 과제훈련이 만성뇌졸중 환자의 보행수행 능력에 미치는 영향 (The Effects of Task-Related Circuit Training by Type of Dual Task on the Gait of Chronic Stroke Patients)

  • 김현애;서교철
    • 대한물리의학회지
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    • 제8권3호
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    • pp.407-415
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    • 2013
  • PURPOSE: This study is to examine the effects of different types of tasks on gait functions of chronic stroke patients when different types of dual tasks were applied while the patients were implementing practical and continuous circuit tasks using their upper and lower extremities circulating many workbenches. METHODS: Forty-four chronic stroke patients were divided into a dual motor circuit task training group, a dual cognitive circuit task training group and a simple task training group. Before training, all the patients were identically encouraged to receive conservative physical therapy for 30 minutes by a physical therapist were thereafter made to train for 30 minutes, five times a week for a total of eight weeks with individual additional tasks. The dual motor circuit task training consisted of continuous circuit training motor tasks and additional motor tasks and the dual cognitive circuit task training consisted of tasks combining the same circuit training motor tasks and additional cognitive tasks. The simple task training consisted of natural walks on a flat terrain to the front, rear and lateral sides of the terrain. Changes in functional gait abilities made through the training were evaluated using GAITRite. SPSS Win 12.0 was used for the data analysis. RESULTS: As for the gait variables that showed significant differences in comparison between the groups over the training period, the dual motor circuit task training group showed more significant differences than the dual cognitive circuit task training group and the simple task training group at 4 weeks and 8 weeks of training(p<.05). CONCLUSION: Therefore, it could be seen that the practical and continuous dual circuit task training was more effective than simple task training on gait. In comparison between the types of dual tasks, the dual motor circuit task training group showed more effects than the dual cognitive circuit task training group.

R-C 분포회로에 관한 연구 (Research on R-C Distributed Circuits)

  • 박송배
    • 대한전자공학회논문지
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    • 제3권2호
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    • pp.10-17
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    • 1966
  • 어떤 R-C 분포회로의 징분방정식의 해가 기지일 때 이것을 이용하여 다수의 다른 분포회로의 징분방정식의 해를 구하는 방법이 얻어졌다. 임의의 R-C 분포회로를 제작의 편의상 R(x)C(x)=일정인 회로로 등가변환하는 도해적방법이 얻어졌으며 해석적증명도 가능하다. 또 이론적 취급의 통일과 간단을 위하여 임의의 R-C분포회로를 R(x), C(x) 어느 한쪽이 일정한 분포회로로 등가변환하는 방법이 얻어졌다. 이 후자의 회로와 근사적인 집중정수회로를 생각하므로서 분포회로의 근사적인 해석, 합성이 비교적 간단하게 이루어 질 수 있다. 6x A method by which solutions of the differential equations of any other distributed circuits can be obtained is described when the solution of the differential equation of an R-C distributed amplifier is known. A graphical method of transforming any R-C ditributed circuit into an equivalent circuit which has a constant R(x)-C(x) was also obtained. The theoretical verification of this method is possible. For simplicity, any R-C distributed circuit can be transformed into an equivalent circuit which is a distributed circuit of either constant R(x) or C(x). Using this equivalent circuit and considering a lumped circuit, an approximate analysis and synthesis can be made simply.

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과제유형에 따른 순환 과제훈련이 뇌졸중 환자의 우울감 및 삶의 질에 미치는 효과 (The Effects of Task-Related Circuit Training by Type of Task on the Depression and Quality of Life in Stroke Patients)

  • 김현애
    • 대한통합의학회지
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    • 제5권1호
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    • pp.1-9
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    • 2017
  • Purpose : This study is to examine the effects of different task-related circuit training by types of tasks on the depression and quality of life in stroke patients. Method : Forty-four chronic stroke patients were divided into a dual motor circuit task training group, a dual cognitive circuit task training group and a simple task training group. Over the course of eight weeks, before training, all the patients were identically encouraged to receive conservative physical therapy for 30 minutes, five times a week for a total of eight weeks with individual additional tasks. The dual motor circuit tasks training consisted of continuous circuit training motor tasks and additional motor tasks and the dual cognitive circuit task training consisted of tasks combining the same circuit training motor tasks and additional cognitive tasks. The simple task training consisted of natural walks on a flat terrain to the front, rear and lateral sides of the terrain. Result : As for the Stroke-Specific Quality of Life(SS-QOL) that showed significant diffe rences in comparison between the groups over the training period, the dual motor circuit task training group showed statistically significant differences in both different types of tasks at 8 weeks(p<.05). The score of Hospital Anxiety and Depression Scale(HADS) decreased in three groups, in the HADS showed significant changes over the training time in the three training groups(p<.05). Conclusion : It could be seen that the practical and continuous dual circuit task training was more effective than simple task training on quality of life. In comparison between the types of dual tasks, the dual motor circuit task training group showed more effects than the dual cognitive circuit task training group. This researcher hopes that the results of this study will be actively applied as rehabilitation methods for chronic stroke patients.

40 Gb/s 광통신 수신기용 클락 복원 회로 설계 (Design of the Clock Recovery Circuit for a 40 Gb/s Optical Receiver)

  • 박찬호;우동식;김강욱
    • 한국전자파학회논문지
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    • 제15권2호
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    • pp.134-139
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    • 2004
  • 40 Gb/s 광 수신기용 클락 복원회로를 설계 및 제작하였다. 클락 복원회로는 전치 증폭기, 다이오드를 이용한 비선형 회로, 대역통과 필터, 클락 증폭기로 구성되어 있다. 40 Gb/s 클락 복원회로를 제작하기에 앞서 10 Gb/s 클락 복원회로를 제작, 측정하였다. 40 Gb/s 클락 복원회로에 -10 dBm의 40 Gb/s NRZ 신호를 입력하였을 때, 비선형 회로를 통과한 후에 40 GHz의 클락이 출력 전력 -20 dBm으로 복원되었다. 비선형 회로를 통과하여 복원된 클락은 협대역 필터를 통과하고, 증폭되게 된다. 제작된 클락 복원회로는 클락의 지터를 감소시키고, 더욱 안정화 시키기 위하여 위상 동기 회로의 입력으로 사용되게 된다.

A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS

  • Tanaka, Tomoki;Kishine, Keiji;Tsuchiya, Akira;Inaba, Hiromi;Omoto, Daichi
    • IEIE Transactions on Smart Processing and Computing
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    • 제5권3호
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    • pp.207-214
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    • 2016
  • Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

XIC tools을 사용한 고온 초전도 Rapid Single Flux Quantum 1-bit A/D Converter의 Simulation과 회로 Layout (Simulations and Circuit Layouts of HTS Rapid Single Flux Quantum 1-bit A/D Converter by using XIC Tools)

  • 남두우;홍희송;정구락;강준희
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2002년도 학술대회 논문집
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    • pp.131-134
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    • 2002
  • In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

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1.5 V Sub-mW CMOS Interface Circuit for Capacitive Sensor Applications in Ubiquitous Sensor Networks

  • Lee, Sung-Sik;Lee, Ah-Ra;Je, Chang-Han;Lee, Myung-Lae;Hwang, Gunn;Choi, Chang-Auck
    • ETRI Journal
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    • 제30권5호
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    • pp.644-652
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    • 2008
  • In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

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전력용 IGBT의 시뮬레이션과 과도 해석 (Simulation of Power IGBT and Transient Analysis)

  • 서영수
    • 한국시뮬레이션학회논문지
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    • 제4권2호
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    • pp.41-60
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    • 1995
  • The IGBT(Insulated Gate Bipolar Transistor) is a power semiconductor device that has gained acceptance among circuit design engineers for motor drive and power converter applications. IGBT devices(International Rectifier, Proposed proposed model etc) have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirememts and high current density capability. When designing circuit and systems that utilize IGBTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The interaction of the IGBT with the load circuit can be described using the device model and the state equation of the load circuit. The voltage rise rate at turn-off for inductive loads varies significantly for IGBTs with different base life times, and this rate of rise is important in determing the voltage overshoot for a given series resistor-inductor load circuit. Excessive voltage overshoot is potentially destructive, so a snubber protection circuit may be required. The protection circuit requirements are unique for the IGBT and can be examined using the model. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

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Highly Robust AHHVSCR-Based ESD Protection Circuit

  • Song, Bo Bae;Koo, Yong Seo
    • ETRI Journal
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    • 제38권2호
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    • pp.272-279
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    • 2016
  • In this paper, a new structure for an advanced high holding voltage silicon controlled rectifier (AHHVSCR) is proposed. The proposed new structure specifically for an AHHVSCR-based electrostatic discharge (ESD) protection circuit can protect integrated circuits from ESD stress. The new structure involves the insertion of a PMOS into an AHHVSCR so as to prevent a state of latch-up from occurring due to a low holding voltage. We use a TACD simulation to conduct a comparative analysis of three types of circuit - (i) an AHHVSCR-based ESD protection circuit having the proposed new structure (that is, a PMOS inserted into the AHHVSCR), (ii) a standard AHHVSCR-based ESD protection circuit, and (iii) a standard HHVSCR-based ESD protection circuit. A circuit having the proposed new structure is fabricated using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology. The fabricated circuit is also evaluated using Transmission-Line Pulse measurements to confirm its electrical characteristics, and human-body model and machine model tests are used to confirm its robustness. The fabricated circuit has a holding voltage of 18.78 V and a second breakdown current of more than 8 A.

L성분이 없는 간략화 Chua 회로 구현에 관한 연구 (A Study on implementation of Simplify Chua's Circuit without L component)

  • 손영우;배영철
    • 한국전자통신학회논문지
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    • 제5권1호
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    • pp.17-22
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    • 2010
  • 일반적으로 카오스 회로에는 Chua's 회로, Lorenz 회로, Duffing 회로 등이 있다. 이들 카오스 회로 중에서 Chua's 회로가 전자부품을 이용하여 가장 쉽게 구성할 수 있는 회로로 알려져 있다. Chua's 회로는 일반적으로 저항성분인 R, 인턱터 성분인 L, 캐패시터 성분인 C로 구성하는 선형요소와 비선형 저항으로 구성하는 비선형 요소로 구성된다. 그러나 L 요소는 포화특성으로 인하여 시중에서 구입한 부품으로는 실제 하드웨어를 구현하기 어려운 문제점이 있다. 본 연구에서는 Chua 회로의 선형 요소인 R,L,C 성분의 요소 중에서 포화 특성을 자지고 있어 상용화된 제품으로는 제작 구현이 어려운 L 성분을 C 성분으로 대체하는 간략화한 Chua's 회로 제작 기법을 PSpice로 해석하고, 그 결과를 확인한다.