• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.48-51
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• 1997

This paper presents the algorithm of FIC inspection in chip mounter. When device is mounted on the PCB, it is impossible to get zero defects since there are many problems which can not be predicted. Of these problems, devices with bent corner leads due to mis-handling and which are not placed at a given point measured along the axis are principal problem in SMT(Surface Mounting Technology). In this paper, we proposed a new algorithm based on the Radon transform which uses a projection to inspect the FIC(Flat Integrated Circuit) device and compared this method with other algorithms. We measured the position error and applied this algorithm to our image processing board which is characterized by line scan camera. We compared speed and accuracy in our board.

• Transactions on Electrical and Electronic Materials
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• 제13권6호
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• pp.292-296
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• 2012

An optimum heat sink for a 30 W chip on board (COB) LED down-light is designed, fabricated, and characterized. By using the SolidWorks Flow simulator and thermal analysis software, the thermal characteristics of the optimum heat sink is analyzed. Four different types of heat sink are simulated and an optimum structure of the heat sink is found. The simulated temperature of the heat sink when operating the LED down-light is $55.9^{\circ}C$, which is only a difference of $2^{\circ}C$ from the measured temperature. In order to reduce the temperature further, a copper spreader is introduced to the heat sink. The temperature of the heat sink with the copper spreader is $3^{\circ}C$ lower than without the copper spreader.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권12호
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• pp.589-595
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• 2004

The ESD protection characteristic of chip varistors on a circuit board can not be analyzed by using a conventional circuit simulator due to its microwave characteristic. Thus, by employing Agilent's microwave circuit simulator ADS, we showed that the ESD Protection characteristic or chip varistors can be investigated. order to got more precise simulation results, a chip varistor model was extracted from the electrical characteristic of a TDK's chip varistor and the distributed circuit based pattern was designed as the ESD propagation path. The simulation results showed that the ESD protection characteristic of a chip varistors can be improved drastically by reducing the ESD propagation path.

• Journal of Forest and Environmental Science
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• 제18권1호
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• pp.61-72
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• 2001

본 연구는 해외조림을 통한 목재의 안정적 확보를 기하기 위하여 태국을 대상으로 투자환경과 수익성 분석을 하였다. 연구결과 태국은 정책적으로 산림률을 현재 25%에서 40%로 유지하려고 노력하고 있기 때문에 조림을 널리 장려하고 있으며, 조림과 목가공산업(합판, 베니어, Chip board, Hard board)은 최소한의 투자요건을 요구하는 업종으로 구분하고 있어 다른 분야보다 상대적으로 유리한 입장이다. 태국에서 현재 가장 역점을 두고 있는 조림수종은 유칼리로서 특히 펄프용으로 이용할 경우 유칼리의 벌기령은 4~5년으로서 매우 짧고 IRR도 29.1~59.3%로 매우 높게 나타났다.

• International Journal of Internet, Broadcasting and Communication
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• 제7권2호
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• pp.161-167
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• 2015

The performance of high power LEDs highly depends on the junction temperature. Operating at high junction temperature causes elevation of the overall thermal resistance which causes degradation of light intensity and lifetime. Thus, appropriate thermal management is critical for LED packaging. The main goal of this research is to improve thermal resistance by optimizing and comparing nano-pore silicon-based thermal substrate to insulated metal substrate and direct bonded copper thermal substrate. The thermal resistance of the packages are evaluated using computation fluid dynamic approach for 1 W single chip LED module.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2009년도 춘계학술대회 논문집
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• pp.157-159
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• 2009

LED BLU(Back Light Unit), based on MCPCB(Metal Core Printed Circuit Board) with anodizing oxide dielectric layer and improved thermal dissipation property, are presented. Reflecting cups were also formed on the surface of the MCPCB such that optical coupling between neighboring chips were minimized for improving the photon extraction efficiency. LED chips were directly attached on the MCPCB by using the COB (Chip On Board) scheme.

• 마이크로전자및패키징학회지
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• 제24권3호
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• pp.1-6
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• 2017

As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

• Journal of Welding and Joining
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• 제29권1호
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• pp.25-28
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• 2011

• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 추계학술발표강연 및 논문개요집
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• pp.81-81
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• 1998

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권3호
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• pp.174-180
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• 2009

A new flexible electronics technology, named P-FCB (Planar Fashionable Circuit Board), is introduced. P-FCB is a circuit board technology implemented on the plain fabric patch for wearable electronics applications. In this paper, the manufacturing of P-FCB, and its electrical characteristics such as sheet resistance, maximum current density, and frequency characteristics are reported. The fabrication methods and their electrical characteristics of passive devices such as resistor, capacitor, and inductor in P-FCB are discussed. In addition, how to integrate silicon chip directly to the fabric for the flexible electronics system are described. Finally, examples of P-FCB applications will be presented.