• Transactions of the Korean Society of Mechanical Engineers B
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• v.30 no.2 s.245
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• pp.110-116
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• 2006

A syringe pump or a device using high electric voltage has been used for controlling flows inside a LOC (lab-on-a-chip). Compared to LOC, however, these microfluidic devices are large and heavy that they are burdensome for a portable ${\mu}-TAS$ (micro total analysis system). In this study, a new flow control technique employing pressure regulators and pressure chambers was developed. This technique utilizes compressed air to control the micro-scale flow inside a LOC, instead of a mechanical actuator or an electric power supply. The pressure regulator controls the output air pressure by adjusting the variable resistor attached. We checked the feasibility of this system by measuring the flow rate inside a capillary tube of $100{\mu}m$ diameter in the Re numbers ranged from 0.5 to 50. In addition, the performance of this flow control system was compared with that of a conventional syringe pump. The developed flow control system was found to show superior performance, compared with the syringe pump. It maintains automatically the: air pressure inside a pressure chamber whether the flow inside the capillary tube is on or off. Since the flow rate is nearly proportional to the resistance, we can control flow in multiple microchannels precisely. However, the syringe pump shows large variation of flow rate when the fluid flow is blocked in the microchannel.

• The Transactions of the Korea Information Processing Society
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• v.2 no.1
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• pp.66-74
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• 1995

A 8-bit 15MHz CMOS subranging Analog-to-Digital converter for high-speed, low-power consumption applications is described. Subranging, 2 step flash, A/D converter used a new resistor string and a simple comparator architecture for the low power consumption and small chip area. Comparator exhibites 80dB loop gain, 50MHz conversion speed, 0.5mV offset and maximum error of voltage divider was 1mV. This Analog-to-Digital converter has been designed and fabricated in 1.2 m N-well CMOS technology. It consumed 150mW power at ＋5/-5V supply and delayed 65ns. The proposed Analog-to-Digital converter seems suitable for high- speed, low-power consumption, small area applications and one-chip mixed Analog- Digital system. Simulations are performed with PSPICE and a fabricated chip is tested.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.3
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• pp.18-27
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• 2010

In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage，due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.557-560
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• 2004

In this study, we design the one-chip PWM IC for SMPS (Switching Mode Power Supply) application. We determine the IC spec. and simulated each block of PWM IC (Reference, Error amp., Comparator, Oscillator) with Smart Spice (SILVACO Circuit Simulation Tool). Reference circuits generate constant voltage(5V) in the various of power supply and temperature condition. Error amp. is designed with large DC gain (${\simeq}65dB$), unity frequency (${\simeq}190kHz$) and large PM($75^{\circ}$).Saw tooth generators operate with 20K oscillation frequency (external resistor, capacitor).

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.675-678
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• 1998

In this paper, power amplifiers for PCS phone were designed with the GEC Marconi H40 HEMT libray. The 1st stage was carefully designed in order to obtain k〉1 using a parallel resistor, and its S21 gain of 18.3dB and input reflection coefficient of -4dB were obtained. And S21 gain of 18dB and input reflection coefficient of -7dB were obtained from the 2nd stage. Finally, total S21 gain of 38dB, input reflection coefficient of -16dB, power gain of 35.2dB, output power of 28.7dBm and PAE(power added efficiency) of 29% were obtained from the designed MMIC power amplifiers. The chip size is $1.729$\times$0.94\textrm{mm}^2.$

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.38-45
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• 2007

A new 8-bit single-slope ADC using analog RAMP generator with digitally controllable dynamic range has been proposed and simulated for column level or per-pixel CMOS image sensor application. The conversion gain of ADC can he controlled easily by using frequency divider with digitally controllable diviber ratio, coarse/fine RAMP with class-AB op-amp, resistor strings, decoder, comparator, and etc. The chip area and power consumption can be decreased by simplified analog circuits and passive components. Proposed frequency divider has been implemented and verified with 0.65um, 2-poly, 2-metal standard CMOS process. And the functional verification has been simulated and accomplished in a 0.35$\mu$m standard CMOS process.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.174-180
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• 2009

A new flexible electronics technology, named P-FCB (Planar Fashionable Circuit Board), is introduced. P-FCB is a circuit board technology implemented on the plain fabric patch for wearable electronics applications. In this paper, the manufacturing of P-FCB, and its electrical characteristics such as sheet resistance, maximum current density, and frequency characteristics are reported. The fabrication methods and their electrical characteristics of passive devices such as resistor, capacitor, and inductor in P-FCB are discussed. In addition, how to integrate silicon chip directly to the fabric for the flexible electronics system are described. Finally, examples of P-FCB applications will be presented.

• Journal of information and communication convergence engineering
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• v.14 no.4
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• pp.268-271
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• 2016

An efficient inductive switching noise suppression technique for mixed-signal integrated circuits (ICs) using standard CMOS digital technology is proposed. The proposed design technique uses a parallel RC circuit, which provides a damping path for the switching noise. The proposed design technique is used for designing a mixed-signal circuit composed of a ring oscillator, a digital output buffer, and an analog noise sensor node for $0.13-{\mu}m$ CMOS digital IC technology. Simulation results show a 47% reduction in the on-chip inductive switching noise coupling from the noisy digital to the analog blocks in the same substrate without an additional propagation delay. The increased power consumption due to the damping resistor is only 67% of that of the conventional source damping technique. This design can be widely used for any kind of analog and high frequency digital mixed-signal circuits in CMOS technology

• KIEE International Transactions on Electrophysics and Applications
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• v.5C no.4
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• pp.152-154
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• 2005

We demonstrate a simple $CO_2$ laser by controlling firing angle of a TRIAC switch in ac power line. The power supply for our laser system switches the voltage of the AC power line (60Hz) directly. The power supply does not need elements such as a rectifier bridge, energy-storage capacitors, or a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60Hz and the firing angle of TRIAC gate is varied from $45^{circ}$ to $135^{circ}$. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of the TRIAC precisely. The maximum laser output of 40W is obtained at a total pressure of 18 Torr, a pulse repetition rate of 60Hz, and a TRAIC gate firing angle of $90^{circ}$.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.3
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• pp.79-86
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• 1992

The cause of excess current noise which appears some times in RuO$_2$ thick film chip resistors and the process to reduce such noise are investigated. We observed that too large thermal expansion coefficients of resistor paste and electrode metal paste can induce the mechanical stress and microcracks in the contact region of the two sintered materials. Such microcracks result in the reduction of conduction paths in the sintered electrode and this provokes the increase of the resistance value and the current noise. Such excessive current noise induced by microcracks could be reduced or even eliminated by using an enlarged overcoat patterns in the plating process or by adding an additional annealing process before plating.