• 전기학회논문지P
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• 제63권2호
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• pp.81-88
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• 2014

In this paper, an implementation of concurrent backoff delay process on a single chip with IEEE 802.15.4 hardware and 8051 processor core that can be used for analyzing the interference on IEEE 802.15.4 channels due to WiFi traffics is studied. The backoff delay process of IEEE 802.15.4 CSMA-CA algorithm is explained. The characteristics of random number generator, timer, and CCA register included in the single chip are described with their control procedure in order to implement the process. A concurrent backoff delay process to evaluate multiple IEEE 802.15.4 channels is proposed, and a method to service the associated tasks at sequentially ordered backoff delay events occurring on the channels is explained. For the implementation of the concurrent backoff delay process on a single chip IEEE 802.15.4 hardware, the elements for the single channel backoff delay process and their control procedure are used to be extended to multiple channels with little modification. The medium access delay on each channel, which is available after execution of the concurrent backoff delay process, is displayed on the LCD of an IEEE 802.15.4 channel analyzer. The experimental results show that we can easily identify the interference on IEEE 802.15.4 channels caused by WiFi traffics in comparison with the way displaying measured channel powers.

• 한국통신학회논문지
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• 제26권12C호
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• pp.273-279
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• 2001

본 논문은 ISDN(Integrated Services Digital Network)망에서 저가형 멀티미디어 통신 단말에 사용될 ISDN 시스템 통합 칩의 설계 및 구현에 관한 것이다. ISDN 시스템 통합 칩은 32비트 RISC 프로세서를 가진 단말용 ISDN시스템 제어 칩으로서, ISDN S 인터페이스 송수신기를 포함하는 ISDN 통신망 접속기능, G.711 음성 코덱 기능 그리고, 데이터통신을 위한 PC 인터페이스 기능을 포함하는 ISDN 통신 단말에 필요한 모든 하드웨어 기능과 Q.931 호 제어 프로토콜을 포함하는 ISDN 프로토콜 및 인터넷 프로토콜 등을 내장하고 있다. 따라서 외부 부착 소자들을 최소화하여, ISDN 기본 속도 인터페이스(BRI : Basic Rate Interface)에 접속되는 ISDN 단말장치 또는 ISDN 터미널 정합장치의 구성 시 최적의 솔루션을 제공한다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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• pp.24-29
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• 1991

RCCL(Robot Control C Library) is general purpose robot control language. It is programmed with C language and composed of C library. So it is well portable and supports sensor integration control and high level force control algorithms. We implemented RCCL on PUMA. We developed servo controller of DDC(Direct Digital Control). We used intel 8097BH one chip micro controller as CPU. One digital servo board controls three motors. Host computer is IBM PC 386DX-33 with RCCL.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.340-343
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• 1995

This paper consists of the position control of induction motor using Generalized Predictive Control. Full order flux observer is also used for the purpose of estimating rotor fluxes. By using Generalized Predictive Control algorithm, the improved position control is realized in this paper. The proposed control method has been implemented by a 32 bit floating point TMS320C31 DSP chip.

• 디지털콘텐츠학회 논문지
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• 제18권7호
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• pp.1451-1456
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• 2017

본 연구에서는 형상기억합금(SMA)을 응용한 스마트 액추에이터의 효율적 제어를 위한 통합 액추에이터-제어기 시스템 설계를 논의한다. 이를 위하여 두 개의 스마트 SMA 액추에이터 유닛과 함께 제어를 위한 싱글 칩 마이크로프로세서, 액추에이터 드라이버, 센서를 통합한 새로운 액추에이터-제어기 모듈을 설계하고 제작하였다. 제안된 시스템에서는 피드백 제어를 위해 모듈의 회전을 측정하는 6축 모션센서 칩과 SMA의 저항을 측정하는 회로를 포함한다. 실험을 통하여 액추에이터의 구동과 센서 신호와 통신을 확인하였고 이를 통하여 실제 액추에이터-제어기 시스템의 작동을 확인하였다.

• 제어로봇시스템학회논문지
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• 제3권4호
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• pp.363-372
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• 1997

In this paper, the design and the implementation of the adaptive learning rate neural network controller for an articulate robot, which is being developed (or) has been developed in our Automatic Control Laboratory, are mainly discussed. The controller reduces software computational load via distributed processing method using multiple CPU's, and simplifies hardware structures by the time-division control with TMS32OC31 DSP chip. Proposed neural network controller with adaptive learning rate structure using expert's heuristics can improve learning speed. The proposed controller verifies its superiority by comparing response characteristics of conventional controller with those of the proposed controller that are obtained from the experiments for the 5 axis vertical articulated robot. We, also, present the generalization property of proposed controller for unlearned trajectory and the change of load through experimental data.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권9호
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• pp.541-545
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• 2000

We propose a pulsed $CO_2$laser below 30W by the AC(60Hz) switching control of leakage transformer primary which has some advantages of cost and size compared to a typical pulsed power supply. Pulse repetition rate is adjusted from 5 Hz to 60 to Hz control laser output. In this laser a low voltage open loop control for high voltage pulse discharge circuit is employed to aviod the Hv sampling or switching and high voltage leakage transformer is used to convert low voltage pulse rectified from AC to high voltage one. A ZCS(Zero Crossing Switch) circuit and a PIC(programble one-chip microprocessor are used to control gate signal of SCR precisely. The pulse repetition rate is limited by 60Hz due to the frequency of AC line and a high leadkage inductance. The maximum laser output was about 23 W at pulse repetition rate of 60Hz total gas mixture of $CO_2$ : $N_2$ : He=1: 9: 15 and total pressure of 18 Torr

• 대한의용생체공학회:의공학회지
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• 제15권2호
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• pp.167-174
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• 1994

In this paper, a DSP and microcomputer-based EMG controlled functional electrical stimulation (FES) system, for restoring walking of paraplegics at the patients' own command, is presented. The above-lesion EMG is a time-varying nonstationary signal and its autoregressive (AR) parameters are identified by the nonstationary identification algorithm using a DSP chip. The identified AR parameters are used for the cloassification of the function and the control of the movement. The below-lesion response-EMG signal is used as a measure of muscle fatigue. This FES system is designed to measure muscle fatigue and control the stimulation intensity according to the amplitude of the response-EMG signal. While the automatic electrical intensity control is obtained by identifying the movement, the proposed FES system is suitable for the automatic control of paraplegic walking.

• 대한전자공학회논문지SD
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• 제46권6호
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• pp.16-24
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• 2009

본 논문에서는 인덕터와 커패시터를 집적화한 DC-DC 벅 변환기를 설계하였다. 출력전압의 리플크기를 줄이기 위해 stacked interleaved 방식을 이용하였고 변환기의 제어부는 전압모드 방식의 제어방법을 사용하여 설계하였다. 설계한 DC-DC 벅 변환기는 표준 $0.5{\mu}m$ CMOS 공정으로 제작 중이며 전체면적은 $9mm^2$이다. 설계된 회로는 $3V{\sim}5V$의 입력전압에서 동작하며 LC 필터의 크기를 줄이기 위해 50MHz의 주파수로 동작하였다. 최대 250mA의 부하전류 구동이 가능하며 최대 71%의 전력변환 효율을 가졌다.

• KIEE International Transactions on Electrophysics and Applications
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• 제4C권4호
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• pp.145-148
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• 2004

In this study, a DNA chip with a microelectrode array was fabricated using microfabrication technology. Several probe DNAs consisting of mercaptohexyl moiety at their 5' end were immobilized on the gold electrodes by a DNA arrayer. Then target DNAs were hybridized and reacted with Hoechst 33258, which is a DNA minor groove binder and electrochemically active dye. Linear sweep voltammetry or cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. It was derived from Hoechst 33258 and concentrated at the electrode surface through association with the formed hybrid. This suggested that this DNA chip could recognize the sequence specific genes.