• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.6
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• pp.34-42
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• 2000

Recently, there is a growing need to develope small-size RF chip inductors operating to GHz to realize high-performance, micro-fabricated wireless communication products. For the development of high-performance RF chip inductors, however, the ferrite-based chip inductors can not be used above 300MHz due to the limitation of the permeability of this material. In this work, small-size, high-performance RF chip inductors utilizing amorphous $Al_2O_3$ core material were investigated. Copper (Cu) with 40${\mu}m$ diameter was used as the coils and the chip inductor size fabricated in this work is $2.1mm{\times}1.5mm{\times}1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on the bottom edges of a core material. The composition of core materials was measured using a EDX. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The developed inductors have the self-resonant frequency (SRF) of 1 to 3.5 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.1
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• pp.7-14
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• 2008

In this paper, we propose VATL(Voltage-controlled Artificial Transmission Line) employing periodically loaded diodes for application to on-chip matching components on MMIC. Compared with conventional microstrip line, the VATL showed a much shorter wave length due to periodic capacitance of diodes, and the characteristic impedance of the VATL was easily controlled bγ changing supplied voltage. Concretely, the characteristic impedance of the VATL was changed from $80{\sim}20{\Omega}$ in a range of $0{\sim}1.05V$ and the VATL showed a wavelength of 1.5mm at 20GHz, while conventional microstrip line showed a wavelength of 5.3mm at the same frequency. Using the VATL, a ${\lambda}/4$ impedance transformer was fabricated on GaAs MMIC for application to on-chip matching components on MMIC. Using the ${\lambda}/4$ impedance transformer made it possible to perform impedance matching between RF components with various characteristic impedance of $30{\sim}100{\Omega}$ by adjusting applied Voltage.

• Journal of Navigation and Port Research
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• v.46 no.3
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• pp.179-190
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• 2022

In this study, we investigated the characteristic impedance and bandwidth of CPW3DCS (coplanar waveguide employing periodic 3D coupling structures), and examined its potential for the development of a marine radio communication FISoC (fully-integrated system on chip) semiconductor device. To extract bandwidth and characteristic impedance of the CPW3DC, we induced a measurement-based equation reflecting measured insertion loss, and compared the measured results of the propagation constant β and characteristic impedance with the measured ones. According to the results of the comparison, the calculated results show a good agreement with the measured ones. Concretely, the propagation constant β and characteristic impedance exhibited an maximum error of 3.9% and 6.4%, respectively. According to the results of this study, in a range of LT = 30 ~ 150 ㎛ for the length of periodic structures, the CPW3DC exhibited a passband characteristic of 121 GHz, and a very small dependency of characteristic impedance on frequency. We could realize a low impedance transmission line with a characteristic impedance lower than 20 Ω by using CPW3DCS with a line width of 20 ㎛, which was highly reduced, compared with a 3mm line width of conventional transmission line with the same impedance. The characteristic impedance was easily adjusted by changing LT. The above results indicate that the CPW3DC can be usefully used for the development of a wireless communication FISoC (fully-integrated system on chip) semiconductor device. This is the first report of a study on the bandwidth of the CPW3DC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.7
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• pp.1076-1085
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• 2001

In this paper, the FMM(Fast Multipole Method) combined with GMRES(Generalized Minimal RESidual Method) matrix solver is used to extract the parasitic impedance for complicated 3-D structures in uniform dielectric materials which limit the use of MoM(Method of Moment) due to its large computation time and memory requirement. This algorithm is a fast multipole-accelerated method based on quasistatic analysis and is very efficient for computing impedance between conductors. This paper proved the accuracy and efficiency of the FMM by comparing with MoM in simple examples. Finally the parasitic impedance of FC-PGA(Flip Chip Pin Grid Array) Package pins has been extracted by this algorithm and we have considered the possibility of the EMI/EMC problem caused by the signal interference.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.5
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• pp.283-288
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• 2000

In this work, small-size, high-performance simple solenoid-type RF chip inductors utilizing an Al2O3 core material were investigated. Copper (Cu) wire with $40\mum$ diameter was used as the coils and the size of the chip inductor fabricated in this work was $2.1mm\times1.5mm\times1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on each end of backsides of a core material. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. The developed inductors have the self-resonant frequency (SRF) of 1.1 to 3.1 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1991.10a
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• pp.73-78
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• 1991

In this study of stacked type film chip capacitor, the important parameters are heat-treated temperature, pressure and time. We measured the temperature dependence of dielectric properties and dissipation factor and the frequency dependence of dielectric properties, dissipation factor, ESR(Equivalent Series Resistance) and impedance in stacked type film capacitor. As a result, the best conditions of heat-treated temperature, pressure and time were proved to be 130$^{\circ}C$, 10kg/$\textrm{cm}^2$ and 3hrs, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.3
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• pp.632-638
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• 2011

This paper presents on-chip Design-for-Testability (DFT) circuit for radio frequency System-on-Chip (SoC) applications. The proposed circuit measures functional specifications of RF integrated circuits such as input impedance, gain, noise figure, input voltage standing wave ratio (VSWRin) and output signal-to-noise ratio (SNRout) without any expensive external equipment. The RF DFT scheme is based on developed theoretical expressions that produce the actual RF device specifications by output DC voltages from the DFT chip. The proposed DFT showed deviation of less than 2% as compared to expensive external equipment measurement. It is expected that this circuit can save marginally failing chips in the production testing as well as in the RF system; hence, saving tremendous amount of revenue for unnecessary device replacements.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.587-590
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• 2005

We investigated the input impedance characteristics of UHF-band RFID tag chip for increased reading range. A voltage multiplier designed using 0.4 ${\mu}m$ $zero-V_T$ MOSFET showed that DC output voltage of 2 V can be obtained using standard CMOS process. The input impedance of the voltage multiplier was examined to achieve impedance level for maximum reading distance using analytical and numerical approaches. The input impedance of the voltage multiplier could be varied in a wide range by selecting the size of MOSFET and the number of multiplying stages of the voltage multiplier, and thus, the impedance level required for the tag antenna can be obtained in presence of other tag circuit blocks.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.146-150
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• 2001

Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. S-parameters of on-chip and substrate were separately measured in the frequency range of 200 MHz to 20 GHz using a microwave network analyzer HP8510 and cascade probe. And the cascade transmission matrix conversion was performed. The same measurements and conversion techniques were conducted on the assembled test chip and substrate at the same frequency range. Then impedance values in ACF flip-chip interconnection were extracted from cascade transmission matrix. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of SiO$_2$filler to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. High frequency behavior of metal Au stud bumps was investigated. The resonance frequency of the metal stud bump interconnects is higher than that of ACF flip-chip interconnects and is not observed at the microwave frequency band. The extracted model parameters of adhesive flip chip interconnects were analyzed with the considerations of the characteristics of material and the design guideline of ACA flip chip for high frequency applications was provided.

• Progress in Superconductivity
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• v.4 no.1
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• pp.74-79
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• 2002

High-speed probe made to test single flux quantum(SFQ) circuits was comprised of semi-rigid coaxial cables and microstrip lines. The impedance was set at 50 $\Omega$to carry high-speed signals without much loss. To do performance test of high-speed probe, we have attempted to fabricate a test chip which has a coplanar waveguide(CPW) structure. Electromagnetic simulation was done to optimize the dimension of CPW so that the CPW structure has an impedance of 50$\Omega$, matching in impedance with the probe. We also used the simulation to investigate the effect of the width of signal line and the gap between signal line and ground plane to the characteristics of CPW structure. We fabricated the CPW structure with a gold film deposited on Si wafer whose resistivity was above $1.5\times$10$_4$$\Omega$.cm. The magnitudes of S／sub 21／ of CPW at 6 ㎓ in simulations and in the actual measurements done with a network analyzer were: -0.1 ㏈ and -0.33 ㏈ (type A),-0.2 ㏈ and -0.48 ㏈ (type B), respectively. Using the test chip, we have successfully tested the performance of high-speed probe made for SFQ circuits. The probe showed the good performance overthe bandwidth of 10 ㎓.